From 942650f24009c08a73cb0b5f86dfa21fa1993fe4 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 1 Jan 2020 20:56:08 +0100 Subject: mb/hp/*/devicetree.cb: Move northbridge devices up It makes more sense for them to be above the southbridge block. Change-Id: I7dc06a46123f4bfc23d91f9c8cc4c9bdc4fb64f5 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/38082 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/hp/2570p/devicetree.cb | 8 +++++--- src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb | 7 ++++--- src/mainboard/hp/folio_9470m/devicetree.cb | 7 ++++--- src/mainboard/hp/revolve_810_g1/devicetree.cb | 7 ++++--- src/mainboard/hp/z220_sff_workstation/devicetree.cb | 8 +++++--- 5 files changed, 22 insertions(+), 15 deletions(-) (limited to 'src') diff --git a/src/mainboard/hp/2570p/devicetree.cb b/src/mainboard/hp/2570p/devicetree.cb index abac78752e..c659be68be 100644 --- a/src/mainboard/hp/2570p/devicetree.cb +++ b/src/mainboard/hp/2570p/devicetree.cb @@ -44,6 +44,11 @@ chip northbridge/intel/sandybridge end device domain 0x0 on subsystemid 0x103c 0x17df inherit + + device pci 00.0 on end # Host bridge Host bridge + device pci 01.0 off end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "docking_supported" = "0" @@ -95,8 +100,5 @@ chip northbridge/intel/sandybridge device pci 1f.5 off end # SATA Controller 2 device pci 1f.6 off end # Thermal end - device pci 00.0 on end # Host bridge Host bridge - device pci 01.0 off end # PCIe Bridge for discrete graphics - device pci 02.0 on end # Internal graphics VGA controller end end diff --git a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb index 660e3b034a..9dc18be9b9 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb +++ b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb @@ -41,6 +41,10 @@ chip northbridge/intel/sandybridge device domain 0x0 on subsystemid 0x103c 0x1495 inherit + device pci 00.0 on end # Host bridge Host bridge + device pci 01.0 on end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "docking_supported" = "0" @@ -176,8 +180,5 @@ chip northbridge/intel/sandybridge device pci 1f.5 off end # SATA Controller 2 device pci 1f.6 off end # Thermal end - device pci 00.0 on end # Host bridge Host bridge - device pci 01.0 on end # PCIe Bridge for discrete graphics - device pci 02.0 on end # Internal graphics VGA controller end end diff --git a/src/mainboard/hp/folio_9470m/devicetree.cb b/src/mainboard/hp/folio_9470m/devicetree.cb index 7d0265d786..b3299e843c 100644 --- a/src/mainboard/hp/folio_9470m/devicetree.cb +++ b/src/mainboard/hp/folio_9470m/devicetree.cb @@ -45,6 +45,10 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did device domain 0x0 on subsystemid 0x103c 0x18df inherit + device pci 00.0 on end # Host bridge Host bridge + device pci 01.0 off end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "docking_supported" = "0" @@ -100,8 +104,5 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did device pci 1f.5 off end # SATA Controller 2 device pci 1f.6 off end # Thermal end - device pci 00.0 on end # Host bridge Host bridge - device pci 01.0 off end # PCIe Bridge for discrete graphics - device pci 02.0 on end # Internal graphics VGA controller end end diff --git a/src/mainboard/hp/revolve_810_g1/devicetree.cb b/src/mainboard/hp/revolve_810_g1/devicetree.cb index 4a08f42b75..1866a1eae0 100644 --- a/src/mainboard/hp/revolve_810_g1/devicetree.cb +++ b/src/mainboard/hp/revolve_810_g1/devicetree.cb @@ -45,6 +45,10 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did device domain 0x0 on subsystemid 0x103c 0x18f8 inherit + device pci 00.0 on end # Host bridge Host bridge + device pci 01.0 off end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "docking_supported" = "0" @@ -100,8 +104,5 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did device pci 1f.5 off end # SATA Controller 2 device pci 1f.6 off end # Thermal end - device pci 00.0 on end # Host bridge Host bridge - device pci 01.0 off end # PCIe Bridge for discrete graphics - device pci 02.0 on end # Internal graphics VGA controller end end diff --git a/src/mainboard/hp/z220_sff_workstation/devicetree.cb b/src/mainboard/hp/z220_sff_workstation/devicetree.cb index 94d079a11c..ab6ee04f67 100644 --- a/src/mainboard/hp/z220_sff_workstation/devicetree.cb +++ b/src/mainboard/hp/z220_sff_workstation/devicetree.cb @@ -40,6 +40,11 @@ chip northbridge/intel/sandybridge device domain 0x0 on subsystemid 0x103c 0x1791 inherit + + device pci 00.0 on end # Host bridge Host bridge + device pci 01.0 on end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller + chip southbridge/intel/bd82x6x # Intel Series 7 PCH register "c2_latency" = "0x0065" register "docking_supported" = "0" @@ -176,8 +181,5 @@ chip northbridge/intel/sandybridge device pci 1f.5 off end # SATA Controller 2 device pci 1f.6 off end # Thermal end - device pci 00.0 on end # Host bridge Host bridge - device pci 01.0 on end # PCIe Bridge for discrete graphics - device pci 02.0 on end # Internal graphics VGA controller end end -- cgit v1.2.3