From 92c1546c01795f8c8c079e7ea03c9cb36314e92a Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Thu, 24 Sep 2020 10:17:58 +0200 Subject: mb/clevo/cml-u: remove the duplicate WiFi PCIe device in devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ibb46bbf0c889bb8b3fd1a4c0331dc719baffc7a2 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/45678 Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) --- src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb index b1899417b9..55c5c6ebf8 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb +++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb @@ -142,15 +142,14 @@ chip soc/intel/cannonlake end device pci 1c.6 off end # PCI Express Port 7 device pci 1c.7 on # PCI Express Port 8 - device pci 00.0 on end # x1 M.2/E 2230 (J_WLAN1) + chip drivers/intel/wifi + device pci 00.0 on end # x1 M.2/E 2230 (J_WLAN1) + end register "PcieRpEnable[7]" = "1" register "PcieRpLtrEnable[7]" = "1" register "PcieClkSrcUsage[2]" = "7" register "PcieClkSrcClkReq[2]" = "2" register "PcieRpSlotImplemented[7]" = "1" - chip drivers/intel/wifi - device pci 00.0 on end - end smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X" end device pci 1d.0 on # PCI Express Port 9 -- cgit v1.2.3