From 90e4d744ccdd280007c3f83376a18818da681ab9 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Sun, 13 Feb 2022 17:33:18 +0100 Subject: amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h: Correct SPD_PERSONALITY_BYTE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Regarding Annex K: Serial Presence Detect (SPD) for DDR3 SDRAM Modules DDR3 - Document Release 6 (JEDEC Standard No. 21-C Page 4.1.2.11 – 69) memory buffer personality bytes is located at bytes 102 ~ 116. Change-Id: I7d225fb5e80b537b4c0ce1c23b7a4524e9109a7b Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/61900 Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth --- src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h b/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h index 654a467db2..6826588e89 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h +++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h @@ -103,7 +103,7 @@ #define SPD_MDQ_800_1066 72 #define SPD_QXODT_800_1066 73 #define SPD_MR1_MR2_800_1066 77 -#define SPD_PERSONALITY_BYTE 150 +#define SPD_PERSONALITY_BYTE 102 #define SPD_FREQ_DIFF_OFFSET 6 -- cgit v1.2.3