From 909be6a7d8ea87e23e4098a97c23e3263a80057d Mon Sep 17 00:00:00 2001 From: Philipp Hug Date: Fri, 26 Oct 2018 13:00:26 +0200 Subject: riscv: Show hart id in trap handler Also show hart id in trap information for easier debugging. Change-Id: I20acf86e1af111600c158295ae03b2167838d127 Signed-off-by: Philipp Hug Reviewed-on: https://review.coreboot.org/c/31201 Tested-by: build bot (Jenkins) Reviewed-by: ron minnich --- src/arch/riscv/trap_handler.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src') diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index e072bf70e2..6ec8e199f1 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -57,6 +57,7 @@ static void print_trap_information(const trapframe *tf) { const char *previous_mode; bool mprv = !!(tf->status & MSTATUS_MPRV); + int hart_id = read_csr(mhartid); /* Leave some space around the trap message */ printk(BIOS_DEBUG, "\n"); @@ -69,6 +70,7 @@ static void print_trap_information(const trapframe *tf) (void *)tf->cause); previous_mode = mstatus_to_previous_mode(read_csr(mstatus)); + printk(BIOS_DEBUG, "Hart ID: %d\n", hart_id); printk(BIOS_DEBUG, "Previous mode: %s%s\n", previous_mode, mprv? " (MPRV)":""); printk(BIOS_DEBUG, "Bad instruction pc: %p\n", (void *)tf->epc); -- cgit v1.2.3