From 8f407f695ec9fa2aa52e3685a8f225f03dfecc1d Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 26 Apr 2016 16:40:55 +0200 Subject: Add board URLs for the RISC-V boards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ifdf40986c2407d8c5b0097654b42e056f4498d39 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/14518 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/emulation/qemu-riscv/board_info.txt | 1 + src/mainboard/emulation/spike-riscv/board_info.txt | 1 + 2 files changed, 2 insertions(+) (limited to 'src') diff --git a/src/mainboard/emulation/qemu-riscv/board_info.txt b/src/mainboard/emulation/qemu-riscv/board_info.txt index 811e8e0840..4d8dcaa40b 100644 --- a/src/mainboard/emulation/qemu-riscv/board_info.txt +++ b/src/mainboard/emulation/qemu-riscv/board_info.txt @@ -1,2 +1,3 @@ Board name: QEMU RISCV Category: emulation +Board URL: https://github.com/riscv/riscv-qemu diff --git a/src/mainboard/emulation/spike-riscv/board_info.txt b/src/mainboard/emulation/spike-riscv/board_info.txt index a1d11f958e..37a0ae9cb7 100644 --- a/src/mainboard/emulation/spike-riscv/board_info.txt +++ b/src/mainboard/emulation/spike-riscv/board_info.txt @@ -1,2 +1,3 @@ Board name: Spike RISCV Category: emulation +Board URL: https://github.com/riscv/riscv-isa-sim -- cgit v1.2.3