From 8f2df280e19f34a1c97adc29acee21a783e1e388 Mon Sep 17 00:00:00 2001 From: Usha P Date: Mon, 17 Jan 2022 20:06:38 +0530 Subject: soc/intel/common: Include Alder Lake-N device IDs Add Alder Lake-N System Agent, PCIE, UFS, IPU and CNVI device IDs. Document: Alder Lake N Platform EDS Volume 1 (Doc# 645548) Signed-off-by: Usha P Change-Id: I0a383816f818b794cf1211766c27937b3b8daa31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61161 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Kangheui Won --- src/include/device/pci_ids.h | 12 ++++++++++++ src/soc/intel/alderlake/bootblock/report_platform.c | 3 +++ src/soc/intel/alderlake/cpu.c | 2 ++ src/soc/intel/common/block/cnvi/cnvi.c | 4 ++++ src/soc/intel/common/block/ipu/ipu.c | 1 + src/soc/intel/common/block/pcie/pcie.c | 2 ++ src/soc/intel/common/block/systemagent/systemagent.c | 2 ++ 7 files changed, 26 insertions(+) (limited to 'src') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 30012d94c2..22962c3885 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3407,6 +3407,8 @@ #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP8 0x54bf #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP9 0x54b0 #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP10 0x54b1 +#define PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP11 0x54b2 +#define PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP12 0x54b3 /* Intel SATA device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_DESKTOP_SATA_IDE 0x8c00 @@ -4022,6 +4024,8 @@ #define PCI_DEVICE_ID_INTEL_ADL_M_ID_2 0x460a #define PCI_DEVICE_ID_INTEL_ADL_N_ID_1 0x4617 #define PCI_DEVICE_ID_INTEL_ADL_N_ID_2 0x461B +#define PCI_DEVICE_ID_INTEL_ADL_N_ID_3 0x461c +#define PCI_DEVICE_ID_INTEL_ADL_N_ID_4 0x4614 /* Intel SMBUS device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_SMBUS 0x8c22 @@ -4229,6 +4233,9 @@ #define PCI_DEVICE_ID_INTEL_JSP_EMMC 0x4dc4 #define PCI_DEVICE_ID_INTEL_ADP_EMMC 0x54c4 +/* Intel UFS device Ids */ +#define PCI_DEVICE_ID_INTEL_ADP_UFS 0x54ff + /* Intel Thunderbolt device Ids */ #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP0 0x9a23 #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP1 0x9a25 @@ -4285,6 +4292,7 @@ #define PCI_DEVICE_ID_INTEL_TGL_H_IPU 0x9a39 #define PCI_DEVICE_ID_INTEL_JSL_IPU 0x4e19 #define PCI_DEVICE_ID_INTEL_ADL_IPU 0x465d +#define PCI_DEVICE_ID_INTEL_ADL_N_IPU 0x462e /* Intel Dynamic Tuning Technology Device */ #define PCI_DEVICE_ID_INTEL_CML_DTT 0x1903 @@ -4318,6 +4326,10 @@ #define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_0 0x43f5 #define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_1 0x43f6 #define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_2 0x43f7 +#define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_0 0x54f0 +#define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_1 0x54f1 +#define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_2 0x54f2 +#define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_3 0x54f3 #define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 01db34f3fd..5c695f29a3 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -47,6 +47,9 @@ static struct { { PCI_DEVICE_ID_INTEL_ADL_M_ID_2, "Alderlake-M" }, { PCI_DEVICE_ID_INTEL_ADL_N_ID_1, "Alderlake-N" }, { PCI_DEVICE_ID_INTEL_ADL_N_ID_2, "Alderlake-N" }, + { PCI_DEVICE_ID_INTEL_ADL_N_ID_3, "Alderlake-N" }, + { PCI_DEVICE_ID_INTEL_ADL_N_ID_4, "Alderlake-N" }, + }; static struct { diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index ed9c245234..b6dc898f4e 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -201,6 +201,8 @@ enum adl_cpu_type get_adl_cpu_type(void) const uint16_t adl_n_mch_ids[] = { PCI_DEVICE_ID_INTEL_ADL_N_ID_1, PCI_DEVICE_ID_INTEL_ADL_N_ID_2, + PCI_DEVICE_ID_INTEL_ADL_N_ID_3, + PCI_DEVICE_ID_INTEL_ADL_N_ID_4, }; const uint16_t mchid = pci_s_read_config16(PCI_DEV(0, PCI_SLOT(SA_DEVFN_ROOT), diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index d3d4085e6a..8ce313586b 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -39,6 +39,10 @@ static const unsigned short wifi_pci_device_ids[] = { PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_1, PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_2, PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_3, + PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_0, + PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_1, + PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_2, + PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_3, 0 }; diff --git a/src/soc/intel/common/block/ipu/ipu.c b/src/soc/intel/common/block/ipu/ipu.c index 30673cd960..a9d2bc093b 100644 --- a/src/soc/intel/common/block/ipu/ipu.c +++ b/src/soc/intel/common/block/ipu/ipu.c @@ -16,6 +16,7 @@ static const uint16_t pci_device_ids[] = { PCI_DEVICE_ID_INTEL_TGL_H_IPU, PCI_DEVICE_ID_INTEL_JSL_IPU, PCI_DEVICE_ID_INTEL_ADL_IPU, + PCI_DEVICE_ID_INTEL_ADL_N_IPU, 0 }; diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index 0c3e2250c7..18f1bc5557 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -366,6 +366,8 @@ static const unsigned short pcie_device_ids[] = { PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP8, PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP9, PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP10, + PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP11, + PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP12, 0 }; diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 2a7979796b..f50690ea79 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -438,6 +438,8 @@ static const unsigned short systemagent_ids[] = { PCI_DEVICE_ID_INTEL_ADL_M_ID_2, PCI_DEVICE_ID_INTEL_ADL_N_ID_1, PCI_DEVICE_ID_INTEL_ADL_N_ID_2, + PCI_DEVICE_ID_INTEL_ADL_N_ID_3, + PCI_DEVICE_ID_INTEL_ADL_N_ID_4, 0 }; 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