From 8e35a5e93de25a38ffe00d396109008c1fab80be Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 3 Aug 2023 16:04:21 +0200 Subject: soc/amd/mendocino/include/data_fabric: add DF IO decode registers PPRs #57243 Rev 3.02 and #56558 Rev 3.04 were used as a reference. Signed-off-by: Felix Held Change-Id: Ic68e73e28362abc5d812839b40282114c7ba25ec Reviewed-on: https://review.coreboot.org/c/coreboot/+/76957 Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth --- src/soc/amd/mendocino/include/soc/data_fabric.h | 46 +++++++++++++++++++++++++ 1 file changed, 46 insertions(+) (limited to 'src') diff --git a/src/soc/amd/mendocino/include/soc/data_fabric.h b/src/soc/amd/mendocino/include/soc/data_fabric.h index 3249a8538b..78d926bc3f 100644 --- a/src/soc/amd/mendocino/include/soc/data_fabric.h +++ b/src/soc/amd/mendocino/include/soc/data_fabric.h @@ -8,6 +8,52 @@ #define IOMS0_FABRIC_ID 9 +#define DF_IO_BASE0 DF_REG_ID(0, 0xc0) +#define DF_IO_LIMIT0 DF_REG_ID(0, 0xc4) + +#define DF_IO_REG0_OFFSET(instance) ((instance) * 2 * sizeof(uint32_t)) +#define DF_IO_BASE_0_7(reg) (DF_IO_BASE0 + DF_IO_REG0_OFFSET(reg)) +#define DF_IO_LIMIT_0_7(reg) (DF_IO_LIMIT0 + DF_IO_REG0_OFFSET(reg)) + +#if CONFIG(SOC_AMD_REMBRANDT) +#define DF_IO_BASE8 DF_REG_ID(6, 0xbc) +#define DF_IO_LIMIT8 DF_REG_ID(6, 0xcc) +#define DF_IO_REG_COUNT 12 +#define DF_IO_BASE(reg) ((reg) < 8 ? DF_IO_BASE_0_7(reg) : \ + DF_IO_BASE8 + ((reg) - 8) * sizeof(uint32_t)) +#define DF_IO_LIMIT(reg) ((reg) < 8 ? DF_IO_LIMIT_0_70(reg) : \ + DF_IO_LIMIT8 + ((reg) - 8) * sizeof(uint32_t)) +#else +#define DF_IO_REG_COUNT 8 +#define DF_IO_BASE(reg) DF_IO_BASE_0_7(reg) +#define DF_IO_LIMIT(reg) DF_IO_LIMIT_0_7(reg) +#endif + +union df_io_base { + struct { + uint32_t re : 1; /* [ 0.. 0] */ + uint32_t we : 1; /* [ 1.. 1] */ + uint32_t : 3; /* [ 2.. 4] */ + uint32_t ie : 1; /* [ 5.. 5] */ + uint32_t : 6; /* [ 6..11] */ + uint32_t io_base : 13; /* [12..24] */ + uint32_t : 7; /* [25..31] */ + }; + uint32_t raw; +}; + +union df_io_limit { + struct { + uint32_t dst_fabric_id : 4; /* [ 0.. 3] */ + uint32_t : 8; /* [ 4..11] */ + uint32_t io_limit : 13; /* [12..24] */ + uint32_t : 7; /* [25..31] */ + }; + uint32_t raw; +}; + +#define DF_IO_ADDR_SHIFT 12 + #define DF_MMIO_BASE0 DF_REG_ID(0, 0x200) #define DF_MMIO_LIMIT0 DF_REG_ID(0, 0x204) #define DF_MMIO_SHIFT 16 -- cgit v1.2.3