From 8b547b19800ab85c97103c87fedbba7512add7d6 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 30 Mar 2010 09:56:35 +0000 Subject: reduce warnings in MCP55 and Fam10 code Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/model_10xxx/fidvid.c | 6 +++--- src/cpu/amd/model_10xxx/processor_name.c | 11 ++++++----- src/mainboard/msi/ms9652_fam10/romstage.c | 5 ++--- src/northbridge/amd/amdfam10/debug.c | 19 +++++++++--------- src/northbridge/amd/amdht/h3ncmn.c | 32 +++++++++++++----------------- src/southbridge/nvidia/mcp55/mcp55_aza.c | 33 ++++++++++++++++--------------- src/southbridge/nvidia/mcp55/mcp55_nic.c | 15 +++++++------- 7 files changed, 58 insertions(+), 63 deletions(-) (limited to 'src') diff --git a/src/cpu/amd/model_10xxx/fidvid.c b/src/cpu/amd/model_10xxx/fidvid.c index b1d6bae7a6..fb8e7da76f 100644 --- a/src/cpu/amd/model_10xxx/fidvid.c +++ b/src/cpu/amd/model_10xxx/fidvid.c @@ -25,21 +25,21 @@ // if we are tight of CAR stack, disable it #define FAM10_SET_FIDVID_STORE_AP_APICID_AT_FIRST 1 -static void print_debug_fv(const char *str, u32 val) +static inline void print_debug_fv(const char *str, u32 val) { #if FAM10_SET_FIDVID_DEBUG == 1 printk(BIOS_DEBUG, "%s%x\n", str, val); #endif } -static void print_debug_fv_8(const char *str, u8 val) +static inline void print_debug_fv_8(const char *str, u8 val) { #if FAM10_SET_FIDVID_DEBUG == 1 printk(BIOS_DEBUG, "%s%02x\n", str, val); #endif } -static void print_debug_fv_64(const char *str, u32 val, u32 val2) +static inline void print_debug_fv_64(const char *str, u32 val, u32 val2) { #if FAM10_SET_FIDVID_DEBUG == 1 printk(BIOS_DEBUG, "%s%x%x\n", str, val, val2); diff --git a/src/cpu/amd/model_10xxx/processor_name.c b/src/cpu/amd/model_10xxx/processor_name.c index 29bc50802d..15604de536 100644 --- a/src/cpu/amd/model_10xxx/processor_name.c +++ b/src/cpu/amd/model_10xxx/processor_name.c @@ -120,13 +120,14 @@ static const struct str_s String2_socket_AM2[] = { }; -char const *unknown = "AMD Processor model unknown"; -char const *unknown2 = " type unknown"; -char const *sample = "AMD Engineering Sample"; -char const *thermal = "AMD Thermal Test Kit"; +const char const *unknown = "AMD Processor model unknown"; +const char const *unknown2 = " type unknown"; +const char const *sample = "AMD Engineering Sample"; +const char const *thermal = "AMD Thermal Test Kit"; -int strcpymax(char *dst, const char *src, int buflen) { +static int strcpymax(char *dst, const char *src, int buflen) +{ int i; for (i = 0; i < buflen && src[i]; i++) dst[i] = src[i]; diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 9ebf659492..e11b4382e5 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -135,9 +135,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) static void sio_setup(void) { - unsigned value; - uint32_t dword; - uint8_t byte; + u32 dword; + u8 byte; byte = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b); byte |= 0x20; diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index ca0a800f70..328de7e289 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -25,7 +25,7 @@ static void udelay_tsc(u32 us); -static void print_debug_addr(const char *str, void *val) +static inline void print_debug_addr(const char *str, void *val) { #if CACHE_AS_RAM_ADDRESS_DEBUG == 1 printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val); @@ -41,7 +41,7 @@ static void print_debug_pci_dev(u32 dev) #endif } -static void print_pci_devices(void) +static inline void print_pci_devices(void) { device_t dev; for(dev = PCI_DEV(0, 0, 0); @@ -66,7 +66,7 @@ static void print_pci_devices(void) } } -static void print_pci_devices_on_bus(u32 busn) +static inline void print_pci_devices_on_bus(u32 busn) { device_t dev; for(dev = PCI_DEV(busn, 0, 0); @@ -117,7 +117,6 @@ static void dump_pci_device(u32 dev) { dump_pci_device_range(dev, 0, 4096); } -static u32 pci_read_config32_index_wait(device_t dev, u32 index_reg, u32 index); static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start, u32 size) { @@ -139,7 +138,7 @@ static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start, } print_debug("\n"); } -static void dump_pci_device_index_wait(u32 dev, u32 index_reg) +static inline void dump_pci_device_index_wait(u32 dev, u32 index_reg) { dump_pci_device_index_wait_range(dev, index_reg, 0, 0x54); dump_pci_device_index_wait_range(dev, index_reg, 0x100, 0x08); //DIMM1 when memclk > 400Hz @@ -148,7 +147,7 @@ static void dump_pci_device_index_wait(u32 dev, u32 index_reg) } -static void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length) +static inline void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length) { int i; print_debug_pci_dev(dev); @@ -169,7 +168,7 @@ static void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length) } -static void dump_pci_devices(void) +static inline void dump_pci_devices(void) { device_t dev; for(dev = PCI_DEV(0, 0, 0); @@ -195,7 +194,7 @@ static void dump_pci_devices(void) } -static void dump_pci_devices_on_bus(u32 busn) +static inline void dump_pci_devices_on_bus(u32 busn) { device_t dev; for(dev = PCI_DEV(busn, 0, 0); @@ -293,7 +292,7 @@ static void dump_smbus_registers(void) } } #endif -static void dump_io_resources(u32 port) +static inline void dump_io_resources(u32 port) { int i; @@ -313,7 +312,7 @@ static void dump_io_resources(u32 port) } } -static void dump_mem(u32 start, u32 end) +static inline void dump_mem(u32 start, u32 end) { u32 i; print_debug("dump_mem:"); diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c index 5b038a3a58..f4696b6daf 100644 --- a/src/northbridge/amd/amdht/h3ncmn.c +++ b/src/northbridge/amd/amdht/h3ncmn.c @@ -1109,16 +1109,14 @@ void ht1SetCFGAddrMap(u8 cfgMapIndex, u8 secBus, u8 subBus, u8 targetNode, u8 ta */ u8 convertBitsToWidth(u8 value, cNorthBridge *nb) { - if (value == 1) { - return 16; - } else if (value == 0) { - return 8; - } else if (value == 5) { - return 4; - } else if (value == 4) { - return 2; + switch(value) { + case 1: return 16; + case 0: return 8; + case 5: return 4; + case 4: return 2; + default: STOP_HERE; /* This is an error internal condition */ } - STOP_HERE; /* This is an error internal condition */ + return 0; // shut up GCC. } /**---------------------------------------------------------------------------------------- @@ -1138,16 +1136,14 @@ u8 convertBitsToWidth(u8 value, cNorthBridge *nb) */ u8 convertWidthToBits(u8 value, cNorthBridge *nb) { - if (value == 16) { - return 1; - } else if (value == 8) { - return 0; - } else if (value == 4) { - return 5; - } else if (value == 2) { - return 4; + switch (value) { + case 16: return 1; + case 8: return 0; + case 4: return 5; + case 2: return 4; + default: STOP_HERE; /* This is an internal error condition */ } - STOP_HERE; /* This is an internal error condition */ + return 0; // shut up GCC } /**---------------------------------------------------------------------------------------- diff --git a/src/southbridge/nvidia/mcp55/mcp55_aza.c b/src/southbridge/nvidia/mcp55/mcp55_aza.c index d4b0e8f2fb..ca002b7eb2 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_aza.c +++ b/src/southbridge/nvidia/mcp55/mcp55_aza.c @@ -30,9 +30,9 @@ #include #include "mcp55.h" -static int set_bits(uint8_t *port, uint32_t mask, uint32_t val) +static int set_bits(u32 port, u32 mask, u32 val) { - uint32_t dword; + u32 dword; int count; val &= mask; @@ -55,9 +55,9 @@ static int set_bits(uint8_t *port, uint32_t mask, uint32_t val) } -static int codec_detect(uint8_t *base) +static int codec_detect(u32 base) { - uint32_t dword; + u32 dword; /* 1 */ set_bits(base + 0x08, 1, 1); @@ -87,7 +87,8 @@ static int codec_detect(uint8_t *base) } -static uint32_t verb_data[] = { +/* FIXME this should go to the mainboard code */ +static u32 verb_data[] = { #if 0 0x00172001, 0x001721e6, @@ -156,18 +157,18 @@ static uint32_t verb_data[] = { 0x01f71f01, }; -static unsigned find_verb(uint32_t viddid, uint32_t **verb) +static unsigned find_verb(u32 viddid, u32 **verb) { if(viddid != 0x10ec0880) return 0; - *verb = (uint32_t *)verb_data; - return sizeof(verb_data)/sizeof(uint32_t); + *verb = (u32 *)verb_data; + return sizeof(verb_data)/sizeof(u32); } -static void codec_init(uint8_t *base, int addr) +static void codec_init(u32 base, int addr) { - uint32_t dword; - uint32_t *verb; + u32 dword; + u32 *verb; unsigned verb_size; int i; @@ -210,7 +211,7 @@ static void codec_init(uint8_t *base, int addr) printk(BIOS_DEBUG, "verb loaded!\n"); } -static void codecs_init(uint8_t *base, uint32_t codec_mask) +static void codecs_init(u32 base, u32 codec_mask) { int i; for(i=2; i>=0; i--) { @@ -221,16 +222,16 @@ static void codecs_init(uint8_t *base, uint32_t codec_mask) static void aza_init(struct device *dev) { - uint8_t *base; + u32 base; struct resource *res; - uint32_t codec_mask; + u32 codec_mask; res = find_resource(dev, 0x10); if(!res) return; - base =(uint8_t *) res->base; - printk(BIOS_DEBUG, "base = %p\n", base); + base = res->base; + printk(BIOS_DEBUG, "base = 0x%08x\n", base); codec_mask = codec_detect(base); diff --git a/src/southbridge/nvidia/mcp55/mcp55_nic.c b/src/southbridge/nvidia/mcp55/mcp55_nic.c index 92ea633a20..4a9b003384 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_nic.c +++ b/src/southbridge/nvidia/mcp55/mcp55_nic.c @@ -31,9 +31,9 @@ #include #include "mcp55.h" -static int phy_read(uint8_t *base, unsigned phy_addr, unsigned phy_reg) +static int phy_read(u32 base, unsigned phy_addr, unsigned phy_reg) { - uint32_t dword; + u32 dword; unsigned loop = 0x100; write32(base+0x190, 0x8000); //Clear MDIO lock bit mdelay(1); @@ -56,9 +56,9 @@ static int phy_read(uint8_t *base, unsigned phy_addr, unsigned phy_reg) } -static void phy_detect(uint8_t *base) +static void phy_detect(u32 base) { - uint32_t dword; + u32 dword; int i; int val; unsigned id; @@ -95,14 +95,13 @@ static void phy_detect(uint8_t *base) static void nic_init(struct device *dev) { - uint32_t dword, old; - uint32_t mac_h, mac_l; + u32 mac_h, mac_l; int eeprom_valid = 0; struct southbridge_nvidia_mcp55_config *conf; - static uint32_t nic_index = 0; + static u32 nic_index = 0; - uint8_t *base; + u32 base; struct resource *res; res = find_resource(dev, 0x10); -- cgit v1.2.3