From 82f0a68a9872d6b82b25ebe022a8e7425113e83d Mon Sep 17 00:00:00 2001 From: Frans Hendriks Date: Wed, 17 Aug 2022 09:59:29 +0200 Subject: soc/intel/tigerlake/fsp_params.c: Add INT D routing for PEG60 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Debian 11 reports ´0:6:0 can´t derive routing for PCI INT D´. Use FIXED_INT_PIRQ for INT D to PIRQ routing table. BUG=NA TEST=Boot Debian 11 on Siemens AS_TGL1 and verify no PIRQ error message in ´dmesg´ Change-Id: If38c7b6f664e0f6533e583ce62504281a4092720 Signed-off-by: Frans Hendriks Reviewed-on: https://review.coreboot.org/c/coreboot/+/66824 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Tim Wawrzynczak --- src/soc/intel/tigerlake/fsp_params.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 2c258409c9..ef75c56b4a 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -122,7 +122,7 @@ static const struct slot_irq_constraints irq_constraints[] = { { .slot = SA_DEV_SLOT_CPU_PCIE, .fns = { - ANY_PIRQ(SA_DEVFN_CPU_PCIE), + FIXED_INT_PIRQ(SA_DEVFN_CPU_PCIE, PCI_INT_D, PIRQ_D), }, }, { -- cgit v1.2.3