From 82d16b150ce3287f4e9f33e86bdde32bc455b193 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Wed, 30 Dec 2020 15:51:10 -0800 Subject: memlayout: Store region sizes as separate symbols This patch changes the memlayout macro infrastructure so that the size of a region "xxx" (i.e. the distance between the symbols _xxx and _exxx) is stored in a separate _xxx_size symbol. This has the advantage that region sizes can be used inside static initializers, and also saves an extra subtraction at runtime. Since linker symbols can only be treated as addresses (not as raw integers) by C, retain the REGION_SIZE() accessor macro to hide the necessary typecast. Signed-off-by: Julius Werner Change-Id: Ifd89708ca9bd3937d0db7308959231106a6aa373 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49332 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/arch/x86/c_start.S | 2 ++ src/arch/x86/car.ld | 17 +++++---------- src/include/memlayout.h | 25 ++++++++++++++++++---- src/include/symbols.h | 8 ++++--- src/lib/program.ld | 12 +++++++++++ src/mainboard/emulation/qemu-aarch64/bootblock.c | 4 +--- src/mainboard/emulation/qemu-aarch64/mainboard.c | 4 +--- src/mainboard/emulation/qemu-aarch64/memlayout.ld | 2 +- .../amd/common/block/cpu/noncar/memlayout_x86.ld | 8 +++---- src/soc/mediatek/mt8173/memlayout.ld | 4 ++-- src/soc/mediatek/mt8183/memlayout.ld | 4 ++-- src/soc/mediatek/mt8192/include/soc/memlayout.ld | 4 ++-- src/soc/qualcomm/ipq40xx/memlayout.ld | 3 --- src/soc/qualcomm/qcs405/memlayout.ld | 8 +++---- src/soc/qualcomm/sc7180/memlayout.ld | 12 +++++------ src/soc/rockchip/rk3288/memlayout.ld | 4 ++-- src/soc/rockchip/rk3399/memlayout.ld | 4 ++-- src/soc/sifive/fu540/memlayout.ld | 4 ++-- 18 files changed, 74 insertions(+), 55 deletions(-) (limited to 'src') diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index 8bebf87435..19532d82dc 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -8,6 +8,7 @@ .section .bss, "aw", @nobits .global _stack .global _estack +.global _stack_size /* Stack alignment is not enforced with rmodule loader, reserve one * extra CPU such that alignment can be enforced on entry. */ @@ -15,6 +16,7 @@ _stack: .space (CONFIG_MAX_CPUS+1)*CONFIG_STACK_SIZE _estack: +.set _stack_size, _estack - _stack #if CONFIG(COOP_MULTITASKING) .global thread_stacks thread_stacks: diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 5207157fe9..5a46b8b2ec 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -11,9 +11,7 @@ #if CONFIG(PAGING_IN_CACHE_AS_RAM) /* Page table pre-allocation. CONFIG_DCACHE_RAM_BASE should be 4KiB * aligned when using this option. */ - _pagetables = . ; - . += 4096 * CONFIG_NUM_CAR_PAGE_TABLE_PAGES; - _epagetables = . ; + REGION(pagetables, ., 4K * CONFIG_NUM_CAR_PAGE_TABLE_PAGES, 4K) #endif #if CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) /* Vboot work buffer only needs to be available when verified boot @@ -28,9 +26,7 @@ /* Stack for CAR stages. Since it persists across all stages that * use CAR it can be reused. The chipset/SoC is expected to provide * the stack size. */ - _car_stack = .; - . += CONFIG_DCACHE_BSP_STACK_SIZE; - _ecar_stack = .; + REGION(car_stack, ., CONFIG_DCACHE_BSP_STACK_SIZE, 4) /* The pre-ram cbmem console as well as the timestamp region are fixed * in size. Therefore place them above the car global section so that * multiple stages (romstage and verstage) have a consistent @@ -42,9 +38,7 @@ * totalling 32 bytes that need to be 32-byte aligned. The reason the * pdpt are not colocated with the rest of the page tables is to reduce * fragmentation of the CAR space that persists across stages. */ - _pdpt = .; - . += 32; - _epdpt = .; + REGION(pdpt, ., 32, 32) #endif TIMESTAMP(., 0x200) @@ -56,10 +50,8 @@ FMAP_CACHE(., FMAP_SIZE) #endif - _car_ehci_dbg_info = .; /* Reserve sizeof(struct ehci_dbg_info). */ - . += 80; - _ecar_ehci_dbg_info = .; + REGION(car_ehci_dbg_info, ., 80, 1) /* _bss and _ebss provide symbols to per-stage * variables that are not shared like the timestamp and the pre-ram @@ -75,6 +67,7 @@ *(.sbss.*) . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _ebss = .; + RECORD_SIZE(bss) #if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE) _shadow_size = (_ebss - _car_region_start) >> 3; diff --git a/src/include/memlayout.h b/src/include/memlayout.h index 424a28a20a..1e9fca8198 100644 --- a/src/include/memlayout.h +++ b/src/include/memlayout.h @@ -33,22 +33,33 @@ SET_COUNTER(name, addr) \ _##name = ABSOLUTE(.); +#define RECORD_SIZE(name) \ + _##name##_size = ABSOLUTE(_e##name - _##name); + #define REGION(name, addr, size, expected_align) \ SYMBOL(name, addr) \ _ = ASSERT(. == ALIGN(expected_align), \ STR(name must be aligned to expected_align!)); \ - SYMBOL(e##name, addr + size) + SYMBOL(e##name, addr + size) \ + RECORD_SIZE(name) #define ALIAS_REGION(name, alias) \ _##alias = ABSOLUTE(_##name); \ _e##alias = ABSOLUTE(_e##name); \ + RECORD_SIZE(alias) + +#define REGION_START(name, addr) SYMBOL(name, addr) + +#define REGION_END(name, addr) \ + SYMBOL(e##name, addr) \ + RECORD_SIZE(name) /* Declare according to SRAM/DRAM ranges in SoC hardware-defined address map. */ -#define SRAM_START(addr) SYMBOL(sram, addr) +#define SRAM_START(addr) REGION_START(sram, addr) -#define SRAM_END(addr) SYMBOL(esram, addr) +#define SRAM_END(addr) REGION_END(sram, addr) -#define DRAM_START(addr) SYMBOL(dram, addr) +#define DRAM_START(addr) REGION_START(dram, addr) #define TIMESTAMP(addr, size) \ REGION(timestamp, addr, size, 8) \ @@ -93,6 +104,7 @@ #define DECOMPRESSOR(addr, sz) \ SYMBOL(decompressor, addr) \ _edecompressor = ABSOLUTE(_decompressor + sz); \ + RECORD_SIZE(decompressor) \ _ = ASSERT(_eprogram - _program <= sz, \ STR(decompressor exceeded its allotted size! (sz))); \ INCLUDE "decompressor/lib/program.ld" @@ -113,6 +125,7 @@ #define BOOTBLOCK(addr, sz) \ SYMBOL(bootblock, addr) \ _ebootblock = ABSOLUTE(_bootblock + sz); \ + RECORD_SIZE(bootblock) \ _ = ASSERT(_eprogram - _program <= sz, \ STR(Bootblock exceeded its allotted size! (sz))); \ INCLUDE "bootblock/lib/program.ld" @@ -125,6 +138,7 @@ #define ROMSTAGE(addr, sz) \ SYMBOL(romstage, addr) \ _eromstage = ABSOLUTE(_romstage + sz); \ + RECORD_SIZE(romstage) \ _ = ASSERT(_eprogram - _program <= sz, \ STR(Romstage exceeded its allotted size! (sz))); \ INCLUDE "romstage/lib/program.ld" @@ -137,6 +151,7 @@ #define RAMSTAGE(addr, sz) \ SYMBOL(ramstage, addr) \ _eramstage = ABSOLUTE(_ramstage + sz); \ + RECORD_SIZE(ramstage) \ _ = ASSERT(_eprogram - _program <= sz, \ STR(Ramstage exceeded its allotted size! (sz))); \ INCLUDE "ramstage/lib/program.ld" @@ -161,6 +176,7 @@ #define VERSTAGE(addr, sz) \ SYMBOL(verstage, addr) \ _everstage = ABSOLUTE(_verstage + sz); \ + RECORD_SIZE(verstage) \ _ = ASSERT(_eprogram - _program <= sz, \ STR(Verstage exceeded its allotted size! (sz))); \ INCLUDE "verstage/lib/program.ld" @@ -180,6 +196,7 @@ #define POSTCAR(addr, sz) \ SYMBOL(postcar, addr) \ _epostcar = ABSOLUTE(_postcar + sz); \ + RECORD_SIZE(postcar) \ _ = ASSERT(_eprogram - _program <= sz, \ STR(Aftercar exceeded its allotted size! (sz))); \ INCLUDE "postcar/lib/program.ld" diff --git a/src/include/symbols.h b/src/include/symbols.h index 6fe24f5e44..fe449d9b4f 100644 --- a/src/include/symbols.h +++ b/src/include/symbols.h @@ -7,11 +7,12 @@ extern u8 _dram[]; -#define REGION_SIZE(name) (_e##name - _##name) +#define REGION_SIZE(name) ((size_t)_##name##_size) #define DECLARE_REGION(name) \ extern u8 _##name[]; \ - extern u8 _e##name[]; + extern u8 _e##name[]; \ + extern u8 _##name##_size[]; /* * Regions can be declared optional if not all configurations provide them in @@ -23,7 +24,8 @@ extern u8 _dram[]; */ #define DECLARE_OPTIONAL_REGION(name) \ __weak extern u8 _##name[]; \ - __weak extern u8 _e##name[]; + __weak extern u8 _e##name[]; \ + __weak extern u8 _##name##_size[]; DECLARE_REGION(sram) DECLARE_OPTIONAL_REGION(timestamp) diff --git a/src/lib/program.ld b/src/lib/program.ld index 7027747bd5..8180d9f1dc 100644 --- a/src/lib/program.ld +++ b/src/lib/program.ld @@ -29,22 +29,26 @@ _cbmem_init_hooks = .; KEEP(*(.rodata.cbmem_init_hooks)); _ecbmem_init_hooks = .; + RECORD_SIZE(cbmem_init_hooks) #endif . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _rsbe_init_begin = .; KEEP(*(.rsbe_init)); _ersbe_init_begin = .; + RECORD_SIZE(rsbe_init_begin) #if ENV_RAMSTAGE . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _pci_drivers = .; KEEP(*(.rodata.pci_driver)); _epci_drivers = .; + RECORD_SIZE(pci_drivers) . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _cpu_drivers = .; KEEP(*(.rodata.cpu_driver)); _ecpu_drivers = .; + RECORD_SIZE(cpu_drivers) #endif . = ALIGN(ARCH_POINTER_ALIGN_SIZE); @@ -52,6 +56,7 @@ *(.rodata.*); . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _etext = .; + RECORD_SIZE(text) } : to_load #if ENV_RAMSTAGE && (CONFIG(COVERAGE) || CONFIG(ASAN_IN_RAMSTAGE)) @@ -82,6 +87,7 @@ _rmodule_params = .; KEEP(*(.module_parameters)); _ermodule_params = .; + RECORD_SIZE(rmodule_params) #endif *(.data); @@ -92,6 +98,7 @@ #if ENV_ROMSTAGE_OR_BEFORE PROVIDE(_preram_cbmem_console = .); PROVIDE(_epreram_cbmem_console = _preram_cbmem_console); + PROVIDE(_preram_cbmem_console_size = ABSOLUTE(0)); #elif ENV_RAMSTAGE . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _bs_init_begin = .; @@ -99,10 +106,12 @@ LONG(0); LONG(0); _ebs_init_begin = .; + RECORD_SIZE(bs_init_begin) #endif . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _edata = .; + RECORD_SIZE(data) } #endif @@ -116,6 +125,7 @@ *(.sbss.*) . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _ebss = .; + RECORD_SIZE(bss) } #endif @@ -126,6 +136,7 @@ . += (ENV_RMODULE ? __heap_size : CONFIG_HEAP_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _eheap = .; + RECORD_SIZE(heap) } #endif @@ -135,6 +146,7 @@ #endif _eprogram = .; +RECORD_SIZE(program) /* Discard the sections we don't need/want */ diff --git a/src/mainboard/emulation/qemu-aarch64/bootblock.c b/src/mainboard/emulation/qemu-aarch64/bootblock.c index 9e90a844bb..45a9de455e 100644 --- a/src/mainboard/emulation/qemu-aarch64/bootblock.c +++ b/src/mainboard/emulation/qemu-aarch64/bootblock.c @@ -4,8 +4,6 @@ #include #include -extern u8 _secram[], _esecram[]; - void bootblock_mainboard_init(void) { mmu_init(); @@ -20,7 +18,7 @@ void bootblock_mainboard_init(void) mmu_config_range(_romstage, REGION_SIZE(romstage), MA_MEM | MA_S | MA_RW); mmu_config_range(_ramstage, REGION_SIZE(ramstage), MA_MEM | MA_S | MA_RW); - mmu_config_range(_secram, REGION_SIZE(secram), MA_MEM | MA_S | MA_RW); + mmu_config_range(_bl31, REGION_SIZE(bl31), MA_MEM | MA_S | MA_RW); mmu_enable(); } diff --git a/src/mainboard/emulation/qemu-aarch64/mainboard.c b/src/mainboard/emulation/qemu-aarch64/mainboard.c index 7bf9260f8a..212064b6f3 100644 --- a/src/mainboard/emulation/qemu-aarch64/mainboard.c +++ b/src/mainboard/emulation/qemu-aarch64/mainboard.c @@ -5,11 +5,9 @@ #include #include -extern u8 _secram[], _esecram[]; - void bootmem_platform_add_ranges(void) { - bootmem_add_range((uintptr_t)_secram, REGION_SIZE(secram), BM_MEM_BL31); + bootmem_add_range((uintptr_t)_bl31, REGION_SIZE(bl31), BM_MEM_BL31); } static void mainboard_enable(struct device *dev) diff --git a/src/mainboard/emulation/qemu-aarch64/memlayout.ld b/src/mainboard/emulation/qemu-aarch64/memlayout.ld index ae00e96665..9c1bb197ce 100644 --- a/src/mainboard/emulation/qemu-aarch64/memlayout.ld +++ b/src/mainboard/emulation/qemu-aarch64/memlayout.ld @@ -16,7 +16,7 @@ SECTIONS { REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8) - REGION(secram, 0xe000000, 0x1000000, 4096) + BL31(0xe000000, 0x1000000) DRAM_START(0x40000000) BOOTBLOCK(0x60010000, 64K) STACK(0x60020000, 54K) diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index ff6aebf3fb..e5044e6d43 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -4,11 +4,11 @@ #include #include -#define EARLY_RESERVED_DRAM_START(addr) SYMBOL(early_reserved_dram, addr) -#define EARLY_RESERVED_DRAM_END(addr) SYMBOL(eearly_reserved_dram, addr) +#define EARLY_RESERVED_DRAM_START(addr) REGION_START(early_reserved_dram, addr) +#define EARLY_RESERVED_DRAM_END(addr) REGION_END(early_reserved_dram, addr) -#define PSP_SHAREDMEM_DRAM_START(addr) SYMBOL(psp_sharedmem_dram, addr) -#define PSP_SHAREDMEM_DRAM_END(addr) SYMBOL(epsp_sharedmem_dram, addr) +#define PSP_SHAREDMEM_DRAM_START(addr) REGION_START(psp_sharedmem_dram, addr) +#define PSP_SHAREDMEM_DRAM_END(addr) REGION_END(psp_sharedmem_dram, addr) BOOTBLOCK_END = CONFIG_ROMSTAGE_ADDR; BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE; diff --git a/src/soc/mediatek/mt8173/memlayout.ld b/src/soc/mediatek/mt8173/memlayout.ld index d9a6d8312d..092cfdf2bf 100644 --- a/src/soc/mediatek/mt8173/memlayout.ld +++ b/src/soc/mediatek/mt8173/memlayout.ld @@ -9,8 +9,8 @@ * It will be returned before starting the ramstage. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. */ -#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) -#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) +#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) +#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) #define DRAM_DMA(addr, size) \ REGION(dram_dma, addr, size, 4K) \ diff --git a/src/soc/mediatek/mt8183/memlayout.ld b/src/soc/mediatek/mt8183/memlayout.ld index a549274376..0acd174c84 100644 --- a/src/soc/mediatek/mt8183/memlayout.ld +++ b/src/soc/mediatek/mt8183/memlayout.ld @@ -9,8 +9,8 @@ * It will be returned before starting the ramstage. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. */ -#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) -#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) +#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) +#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) #define DRAM_INIT_CODE(addr, size) \ REGION(dram_init_code, addr, size, 4) diff --git a/src/soc/mediatek/mt8192/include/soc/memlayout.ld b/src/soc/mediatek/mt8192/include/soc/memlayout.ld index 6f964f2331..2624d82c55 100644 --- a/src/soc/mediatek/mt8192/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8192/include/soc/memlayout.ld @@ -9,8 +9,8 @@ * It will be returned before starting the ramstage. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. */ -#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) -#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) +#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) +#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) #define DRAM_INIT_CODE(addr, size) \ REGION(dram_init_code, addr, size, 64K) diff --git a/src/soc/qualcomm/ipq40xx/memlayout.ld b/src/soc/qualcomm/ipq40xx/memlayout.ld index 4c542949cd..e630e74ebd 100644 --- a/src/soc/qualcomm/ipq40xx/memlayout.ld +++ b/src/soc/qualcomm/ipq40xx/memlayout.ld @@ -4,9 +4,6 @@ #include -#define REGION_START(name, addr) SYMBOL(name, addr) -#define REGION_END(name, addr) SYMBOL(e##name, addr) - SECTIONS { REGION(oc_imem, 0x08600000, 32K, 0) diff --git a/src/soc/qualcomm/qcs405/memlayout.ld b/src/soc/qualcomm/qcs405/memlayout.ld index a2825121b1..348fb43cf5 100644 --- a/src/soc/qualcomm/qcs405/memlayout.ld +++ b/src/soc/qualcomm/qcs405/memlayout.ld @@ -4,12 +4,12 @@ #include /* SYSTEM_IMEM : 0x8600000 - 0x8607FFF */ -#define SSRAM_START(addr) SYMBOL(ssram, addr) -#define SSRAM_END(addr) SYMBOL(essram, addr) +#define SSRAM_START(addr) REGION_START(ssram, addr) +#define SSRAM_END(addr) REGION_END(ssram, addr) /* BOOT_IMEM : 0x8C00000 - 0x8D80000 */ -#define BSRAM_START(addr) SYMBOL(bsram, addr) -#define BSRAM_END(addr) SYMBOL(ebsram, addr) +#define BSRAM_START(addr) REGION_START(bsram, addr) +#define BSRAM_END(addr) REGION_END(bsram, addr) SECTIONS { diff --git a/src/soc/qualcomm/sc7180/memlayout.ld b/src/soc/qualcomm/sc7180/memlayout.ld index ca9c993920..1b9044f691 100644 --- a/src/soc/qualcomm/sc7180/memlayout.ld +++ b/src/soc/qualcomm/sc7180/memlayout.ld @@ -4,16 +4,16 @@ #include /* SYSTEM_IMEM : 0x14680000 - 0x146AE000 */ -#define SSRAM_START(addr) SYMBOL(ssram, addr) -#define SSRAM_END(addr) SYMBOL(essram, addr) +#define SSRAM_START(addr) REGION_START(ssram, addr) +#define SSRAM_END(addr) REGION_END(ssram, addr) /* BOOT_IMEM : 0x14800000 - 0x14980000 */ -#define BSRAM_START(addr) SYMBOL(bsram, addr) -#define BSRAM_END(addr) SYMBOL(ebsram, addr) +#define BSRAM_START(addr) REGION_START(bsram, addr) +#define BSRAM_END(addr) REGION_END(bsram, addr) /* AOP : 0x0B000000 - 0x0B100000 */ -#define AOPSRAM_START(addr) SYMBOL(aopsram, addr) -#define AOPSRAM_END(addr) SYMBOL(eaopsram, addr) +#define AOPSRAM_START(addr) REGION_START(aopsram, addr) +#define AOPSRAM_END(addr) REGION_END(aopsram, addr) SECTIONS { diff --git a/src/soc/rockchip/rk3288/memlayout.ld b/src/soc/rockchip/rk3288/memlayout.ld index 4ef0163def..32962257b2 100644 --- a/src/soc/rockchip/rk3288/memlayout.ld +++ b/src/soc/rockchip/rk3288/memlayout.ld @@ -28,8 +28,8 @@ SECTIONS /* 4K of special SRAM in PMU power domain. * Careful: only supports 32-bit wide write accesses! */ - SYMBOL(pmu_sram, 0xFF720000) + REGION_START(pmu_sram, 0xFF720000) TTB_SUBTABLES(0xFF720800, 1K) WATCHDOG_TOMBSTONE(0xFF720FFC, 4) - SYMBOL(epmu_sram, 0xFF721000) + REGION_END(pmu_sram, 0xFF721000) } diff --git a/src/soc/rockchip/rk3399/memlayout.ld b/src/soc/rockchip/rk3399/memlayout.ld index aa925a25c9..7a4fb70cfc 100644 --- a/src/soc/rockchip/rk3399/memlayout.ld +++ b/src/soc/rockchip/rk3399/memlayout.ld @@ -12,9 +12,9 @@ SECTIONS DMA_COHERENT(0x10000000, 2M) /* 8K of special SRAM in PMU power domain. */ - SYMBOL(pmu_sram, 0xFF3B0000) + REGION_START(pmu_sram, 0xFF3B0000) WATCHDOG_TOMBSTONE(0xFF3B1FFC, 4) - SYMBOL(epmu_sram, 0xFF3B2000) + REGION_END(pmu_sram, 0xFF3B2000) SRAM_START(0xFF8C0000) #if ENV_RAMSTAGE diff --git a/src/soc/sifive/fu540/memlayout.ld b/src/soc/sifive/fu540/memlayout.ld index b365b96563..73faa4b4e8 100644 --- a/src/soc/sifive/fu540/memlayout.ld +++ b/src/soc/sifive/fu540/memlayout.ld @@ -5,8 +5,8 @@ #include -#define L2LIM_START(addr) SYMBOL(l2lim, addr) -#define L2LIM_END(addr) SYMBOL(el2lim, addr) +#define L2LIM_START(addr) REGION_START(l2lim, addr) +#define L2LIM_END(addr) REGION_END(l2lim, addr) SECTIONS { -- cgit v1.2.3