From 820b9c4676ba56da56ed04164335c5dba9d3dcbe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Thu, 30 Sep 2021 21:03:07 +0200 Subject: soc/intel/common: add possiblity to override GPE0 to acpi_fill_soc_wake MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently, only the PM1_STS mask gets passed to `acpi_fill_soc_wake`. To be able to override the GPE0_STS mask as well, also pass that one. To accomplish that, pointers to the variables are passed now. Change-Id: If9f28cf054ae8b602c0587e4dd4a13a4aba810c7 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/58071 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/common/block/acpi/acpi.c | 12 +++++++----- src/soc/intel/common/block/include/intelblocks/acpi.h | 6 +++--- 2 files changed, 10 insertions(+), 8 deletions(-) (limited to 'src') diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 4d3cb739b3..6f7412740a 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -192,10 +192,9 @@ unsigned long southbridge_write_acpi_tables(const struct device *device, } __weak -uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en, - const struct chipset_power_state *ps) +void acpi_fill_soc_wake(uint32_t *pm1_en, uint32_t *gpe0_en, + const struct chipset_power_state *ps) { - return generic_pm1_en; } /* @@ -210,6 +209,7 @@ uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en, int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0) { static uint32_t gpe0_sts[GPE0_REG_MAX]; + uint32_t gpe0_en[GPE0_REG_MAX]; uint32_t pm1_en; int i; @@ -220,14 +220,16 @@ int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint pm1_en = ps->pm1_en; pm1_en |= WAK_STS | PWRBTN_EN; - pm1_en = acpi_fill_soc_wake(pm1_en, ps); + memcpy(gpe0_en, ps->gpe0_en, sizeof(gpe0_en)); + + acpi_fill_soc_wake(&pm1_en, gpe0_en, ps); *pm1 = ps->pm1_sts & pm1_en; /* Mask off GPE0 status bits that are not enabled */ *gpe0 = &gpe0_sts[0]; for (i = 0; i < GPE0_REG_MAX; i++) - gpe0_sts[i] = ps->gpe0_sts[i] & ps->gpe0_en[i]; + gpe0_sts[i] = ps->gpe0_sts[i] & gpe0_en[i]; return GPE0_REG_MAX; } diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h index 59fd24436c..5497275d23 100644 --- a/src/soc/intel/common/block/include/intelblocks/acpi.h +++ b/src/soc/intel/common/block/include/intelblocks/acpi.h @@ -6,6 +6,7 @@ #include #include #include +#include #include /* Forward declare the power state struct here */ @@ -47,10 +48,9 @@ acpi_tstate_t *soc_get_tss_table(int *entries); /* * Chipset specific quirks for the wake enable bits. - * Returns wake events for the soc. */ -uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en, - const struct chipset_power_state *ps); +void acpi_fill_soc_wake(uint32_t *pm1_en, uint32_t *gpe0_en, + const struct chipset_power_state *ps); /* Chipset specific settings for filling up dmar table */ unsigned long sa_write_acpi_tables(const struct device *dev, -- cgit v1.2.3