From 817c58c2aeab0fabe912b58dbe4f24a81d6385ce Mon Sep 17 00:00:00 2001
From: Karthikeyan Ramasubramanian <kramasub@google.com>
Date: Wed, 8 May 2024 13:18:36 -0600
Subject: mb/google/brox: Sending End of Post (EOP) asynchronously

Currently EOP message is sent to CSE late in the boot flow. Instead send
it asynchronously to save ~10 ms in boot time.

BUG=b:337330958
TEST=Build Brox BIOS Image and boot to OS.

Change-Id: I229d16a5dcd072958db3f59a9c364bf7508b3047
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82236
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
---
 src/mainboard/google/brox/Kconfig | 2 +-
 src/soc/intel/alderlake/Kconfig   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig
index 940f3a404b..efe10d28a2 100644
--- a/src/mainboard/google/brox/Kconfig
+++ b/src/mainboard/google/brox/Kconfig
@@ -29,7 +29,7 @@ config BOARD_GOOGLE_BROX_COMMON
 	select MAINBOARD_HAS_TPM2
 	select PMC_IPC_ACPI_INTERFACE
 	select SOC_INTEL_CSE_LITE_SKU
-#	select SOC_INTEL_CSE_SEND_EOP_ASYNC
+	select SOC_INTEL_CSE_SEND_EOP_ASYNC
 	select SOC_INTEL_COMMON_BLOCK_USB4
 	select SOC_INTEL_COMMON_BLOCK_TCSS
 	select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index b124b140b8..e0afe5aeb7 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -82,7 +82,7 @@ config SOC_INTEL_ALDERLAKE
 	select SOC_INTEL_COMMON_FSP_RESET
 	select SOC_INTEL_COMMON_PCH_CLIENT
 	select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_CSE_SEND_EOP_LATE if !BOARD_GOOGLE_BRYA_COMMON
+	select SOC_INTEL_CSE_SEND_EOP_LATE if !BOARD_GOOGLE_BRYA_COMMON && !BOARD_GOOGLE_BROX_COMMON
 	select SOC_INTEL_CSE_SET_EOP
 	select SOC_INTEL_GFX_MBUS_JOIN if MAINBOARD_HAS_CHROMEOS && BMP_LOGO
 	select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
-- 
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