From 8165da740852f9bff49ce4f0b259034d8c75626f Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sat, 17 Aug 2024 18:43:17 +0000 Subject: soc/intel/tigerlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT This patch drops the SoC-specific config option `SOC_INTEL_TIGERLAKE_DEBUG_CONSENT`. Additionally, updates the FSP configuration to use the new generic config option. TEST=Able to build and boot google/volteer without any functional impact while debugging. Change-Id: I3e96b20e7e8b3ce3c2e4884abd315a5cc55fe71d Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/83963 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/intel/tigerlake/Kconfig | 16 ---------------- src/soc/intel/tigerlake/romstage/fsp_params.c | 2 +- 2 files changed, 1 insertion(+), 17 deletions(-) (limited to 'src') diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 59f54aac1a..77e53ad937 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -253,22 +253,6 @@ config FSP_FD_PATH default "3rdparty/fsp/TigerLakeFspBinPkg/TGL_IOT/Fsp.fd" if FSP_TYPE_IOT default "3rdparty/fsp/TigerLakeFspBinPkg/Client/Fsp.fd" if FSP_TYPE_CLIENT -config SOC_INTEL_TIGERLAKE_DEBUG_CONSENT - int "Debug Consent for TGL" - # USB DBC is more common for developers so make this default to 3 if - # SOC_INTEL_DEBUG_CONSENT=y - default 3 if SOC_INTEL_DEBUG_CONSENT - default 0 - help - This is to control debug interface on SOC. - Setting non-zero value will allow to use DBC or DCI to debug SOC. - PlatformDebugConsent in FspmUpd.h has the details. - - Desired platform debug type are - 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), - 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), - 6:Enable (2-wire DCI OOB), 7:Manual - config PRERAM_CBMEM_CONSOLE_SIZE hex default 0x2000 diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index f7337f024d..00b5315afc 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -130,7 +130,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, /* Enable SMBus controller based on config */ m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS); /* Set debug probe type */ - m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT; + m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT; /* Audio: HDAUDIO_LINK_MODE I2S/SNDW */ m_cfg->PchHdaEnable = is_devfn_enabled(PCH_DEVFN_HDA); -- cgit v1.2.3