From 8034813581ad310d567408f050dfa76d5b29144f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Thu, 5 Mar 2020 21:34:43 +0100 Subject: soc/intel/common/block/smm: add Kconfig for TCO SMI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow the user to select if TCO shall issue SMIs or not. Change-Id: Id22777e9573376e5a079a375400caa687bc41afb Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/39326 Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/smm/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src') diff --git a/src/soc/intel/common/block/smm/Kconfig b/src/soc/intel/common/block/smm/Kconfig index ab5ee03a6d..77ba00c027 100644 --- a/src/soc/intel/common/block/smm/Kconfig +++ b/src/soc/intel/common/block/smm/Kconfig @@ -15,6 +15,12 @@ config SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE Disable eSPI SMI source to prevent the embedded controller from asserting SMI while in firmware. +config SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE + bool "Enable TCO SMI" + default n + help + Enable TCO SMI source to e.g. handle case instrusion. + config SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS int default 100 if CHROMEOS -- cgit v1.2.3