From 7f9ceef51be785781ea4c0035c31d718d590a2fb Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Tue, 3 Mar 2020 20:15:02 +0100 Subject: intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selected MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable TCO SMIs in common code, if selected by Kconfig. This is needed for the follow-up commits regarding INTRUDER interrupt. Tested on X11SSM-F. Change-Id: If63effe74ac59b5d051a6454bc6375bb89605215 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/39262 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/include/soc/pm.h | 4 ++-- src/soc/intel/cannonlake/include/soc/pm.h | 2 +- src/soc/intel/common/block/smm/smm.c | 5 ++++- src/soc/intel/icelake/include/soc/pm.h | 2 +- src/soc/intel/skylake/include/soc/pm.h | 2 +- src/soc/intel/tigerlake/include/soc/pm.h | 2 +- 6 files changed, 10 insertions(+), 7 deletions(-) (limited to 'src') diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 0cf06b2a60..510dd03da7 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -78,7 +78,7 @@ #endif #define USB_EN (1 << SMI_XHCI) /* Legacy USB2 SMI logic */ #define PERIODIC_EN (1 << SMI_PERIODIC) /* SMI on PERIODIC_STS in SMI_STS */ -#define TCO_EN (1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */ +#define TCO_SMI_EN (1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */ #define GPIO_EN (1 << SMI_GPIO) /* Enable GPIO SMI */ #define BIOS_RLS (1 << SMI_BIOS_RLS) /* asserts SCI on bit set */ /* start software smi timer on bit set */ @@ -99,7 +99,7 @@ * - on eSPI events (does nothing on LPC systems) * No SMIs: * - on microcontroller writes (io 0x62/0x66) - * - on TCO events + * - on TCO events, unless enabled in common code */ #define ENABLE_SMI_PARAMS \ (ESPI_SMI_EN | APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS | GPIO_EN) diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h index 356f0bcc6f..77109651f0 100644 --- a/src/soc/intel/cannonlake/include/soc/pm.h +++ b/src/soc/intel/cannonlake/include/soc/pm.h @@ -128,7 +128,7 @@ * - on eSPI events (does nothing on LPC systems) * No SMIs: * - on microcontroller writes (io 0x62/0x66) - * - on TCO events + * - on TCO events, unless enabled in common code */ #define ENABLE_SMI_PARAMS \ (APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS) diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index bef923ac1a..ecea473645 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -63,13 +63,16 @@ void smm_southbridge_enable(uint16_t pm1_events) * - on writes to SLP_EN (sleep states) * - on writes to GBL_RLS (bios commands) * - on eSPI events, unless disabled (does nothing on LPC systems) + * - on TCO events (TIMEOUT, case intrusion, ...), if enabled * No SMIs: * - on microcontroller writes (io 0x62/0x66) - * - on TCO events */ if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE)) smi_params &= ~ESPI_SMI_EN; + if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE)) + smi_params |= TCO_SMI_EN; + /* Enable SMI generation: */ pmc_enable_smi(smi_params); } diff --git a/src/soc/intel/icelake/include/soc/pm.h b/src/soc/intel/icelake/include/soc/pm.h index 34c32a9ac2..5bdefc9e4a 100644 --- a/src/soc/intel/icelake/include/soc/pm.h +++ b/src/soc/intel/icelake/include/soc/pm.h @@ -126,8 +126,8 @@ * - on writes to GBL_RLS (bios commands) * - on eSPI events (does nothing on LPC systems) * No SMIs: + * - on TCO events, unless enabled in common code * - on microcontroller writes (io 0x62/0x66) - * - on TCO events */ #define ENABLE_SMI_PARAMS \ (APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS) diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index 007d29cadc..faad1efa05 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -142,8 +142,8 @@ * - on writes to GBL_RLS (bios commands) * - on eSPI events (does nothing on LPC systems) * No SMIs: + * - on TCO events, unless enabled in common code * - on microcontroller writes (io 0x62/0x66) - * - on TCO events */ #define ENABLE_SMI_PARAMS \ (APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS) diff --git a/src/soc/intel/tigerlake/include/soc/pm.h b/src/soc/intel/tigerlake/include/soc/pm.h index d2f47e271b..588dfba7ba 100644 --- a/src/soc/intel/tigerlake/include/soc/pm.h +++ b/src/soc/intel/tigerlake/include/soc/pm.h @@ -132,8 +132,8 @@ * - on writes to GBL_RLS (bios commands) * - on eSPI events (does nothing on LPC systems) * No SMIs: + * - on TCO events, unless enabled in common code * - on microcontroller writes (io 0x62/0x66) - * - on TCO events */ #define ENABLE_SMI_PARAMS \ (APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS) -- cgit v1.2.3