From 7a9b072b289e113552d6cb30e57e4a5dd9ca5d72 Mon Sep 17 00:00:00 2001
From: Elyes Haouas <ehaouas@noos.fr>
Date: Sat, 31 Aug 2024 11:04:54 +0200
Subject: tree: Use boolean for dptf_enable
Change-Id: Ic6e578199e7e4ca3a014eecb1eb7a4d9d24893b8
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84161
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
src/soc/intel/elkhartlake/chip.h | 2 +-
src/soc/intel/tigerlake/chip.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
(limited to 'src')
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index e3a23b2af3..061621cc3e 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -130,7 +130,7 @@ struct soc_intel_elkhartlake_config {
/* Enable S0iX support */
bool s0ix_enable;
/* Enable DPTF support */
- int dptf_enable;
+ bool dptf_enable;
/* Deep SX enable for both AC and DC */
int deep_s3_enable_ac;
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 630317a645..f0cecb3fa7 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -149,7 +149,7 @@ struct soc_intel_tigerlake_config {
uint8_t TcssD3HotDisable;
/* Enable DPTF support */
- int dptf_enable;
+ bool dptf_enable;
/* Deep SX enable for both AC and DC */
int deep_s3_enable_ac;
--
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