From 786a1fec27824632dc441582b5edb2cf9305a1b5 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 7 Jan 2019 15:10:57 +0100 Subject: cpu/intel/gen1/smmrelocate: Check for sanity on SMRR This happens when TSEG is found to be unaligned. Change-Id: Id0c078a880dddb55857af2bca233cf4dee91250a Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/30709 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/cpu/intel/smm/gen1/smmrelocate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c index 426eae5eab..5667648d24 100644 --- a/src/cpu/intel/smm/gen1/smmrelocate.c +++ b/src/cpu/intel/smm/gen1/smmrelocate.c @@ -132,7 +132,7 @@ static void asmlinkage cpu_smm_do_relocation(void *arg) /* Write SMRR MSRs based on indicated support. */ mtrr_cap = rdmsr(MTRR_CAP_MSR); - if (mtrr_cap.lo & SMRR_SUPPORTED) + if (mtrr_cap.lo & SMRR_SUPPORTED && relo_params->smrr_mask.lo != 0) write_smrr(relo_params); southbridge_clear_smi_status(); -- cgit v1.2.3