From 755a0131bec580f39097b2b4475e7bcd673a407e Mon Sep 17 00:00:00 2001 From: Sumeet Pawnikar Date: Fri, 21 Jun 2019 18:05:37 +0530 Subject: mb/google/hatch/variants/baseboard: Update PL2 power limit value Update PL2 power limit value from 44W to 64W. BUG=None BRANCH=None TEST=Build and Boot hatch EVT Change-Id: I3f4b5ab8bf0ce9464c322c148843f5a3e8d706d9 Signed-off-by: Sumeet Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/33662 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Shelley Chen --- src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 2 +- .../google/hatch/variants/baseboard/include/baseboard/acpi/dptf.asl | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index a66c74328e..9a9125396c 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -36,7 +36,7 @@ chip soc/intel/cannonlake # Enable DPTF register "dptf_enable" = "1" register "tdp_pl1_override" = "15" - register "tdp_pl2_override" = "44" + register "tdp_pl2_override" = "64" register "Device4Enable" = "1" # Enable eDP device register "DdiPortEdp" = "1" diff --git a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/acpi/dptf.asl index ff7db49334..b18932ec6c 100644 --- a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/acpi/dptf.asl @@ -118,7 +118,7 @@ Name (MPPC, Package () Package () { /* Power Limit 2 */ 1, /* PowerLimitIndex, 1 for Power Limit 2 */ 15000, /* PowerLimitMinimum */ - 44000, /* PowerLimitMaximum */ + 64000, /* PowerLimitMaximum */ 28000, /* TimeWindowMinimum */ 32000, /* TimeWindowMaximum */ 1000 /* StepSize */ -- cgit v1.2.3