From 73b723d7dbb371ec294c5306b8a839cfe93e1bcd Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 31 Jul 2018 16:41:06 -0500 Subject: google/cyan: Switch Touchpad and Touchscreen interrupts to be level-triggered Adapted from chromium commit 126d352 [Strago: switch Touchpad and Touchscreen interrupts to be level-triggered] The Elan and other touch controllers found in this device work much more reliably if used with level-triggered interrupts rather than edge-triggered. TEST=Boot several cyan boards, verify that touchpad and touchscreen work. Original-Change-Id: I59d05d9dfa9c41e5472d756ef51f0817a503c889 Original-Signed-off-by: Dmitry Torokhov Original-Reviewed-on: https://chromium-review.googlesource.com/894689 Original-Reviewed-by: Aaron Durbin Change-Id: Ia4f8cf83351dae0d78995ce0b0ed902d1e4ac3e8 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/27759 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/mainboard/google/cyan/acpi/trackpad_atmel.asl | 2 +- src/mainboard/google/cyan/variants/banon/gpio.c | 4 ++-- src/mainboard/google/cyan/variants/celes/gpio.c | 2 +- src/mainboard/google/cyan/variants/cyan/gpio.c | 4 ++-- src/mainboard/google/cyan/variants/edgar/gpio.c | 2 +- src/mainboard/google/cyan/variants/kefka/gpio.c | 4 ++-- src/mainboard/google/cyan/variants/reks/gpio.c | 4 ++-- src/mainboard/google/cyan/variants/relm/gpio.c | 4 ++-- src/mainboard/google/cyan/variants/setzer/gpio.c | 4 ++-- src/mainboard/google/cyan/variants/terra/gpio.c | 2 +- src/mainboard/google/cyan/variants/ultima/gpio.c | 4 ++-- src/mainboard/google/cyan/variants/wizpig/gpio.c | 4 ++-- src/soc/intel/braswell/include/soc/gpio.h | 9 +++++---- 13 files changed, 25 insertions(+), 24 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/cyan/acpi/trackpad_atmel.asl b/src/mainboard/google/cyan/acpi/trackpad_atmel.asl index 96ec3db571..96f3185804 100644 --- a/src/mainboard/google/cyan/acpi/trackpad_atmel.asl +++ b/src/mainboard/google/cyan/acpi/trackpad_atmel.asl @@ -33,7 +33,7 @@ Scope (\_SB.PCI0.I2C6) AddressingMode7Bit, // AddressingMode "\\_SB.PCI0.I2C6", // ResourceSource ) - GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,, + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullNone,, "\\_SB.GPNC") { BOARD_TRACKPAD_GPIO_INDEX } }) diff --git a/src/mainboard/google/cyan/variants/banon/gpio.c b/src/mainboard/google/cyan/variants/banon/gpio.c index e077bccbcf..92ef836c0d 100644 --- a/src/mainboard/google/cyan/variants/banon/gpio.c +++ b/src/mainboard/google/cyan/variants/banon/gpio.c @@ -161,9 +161,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_NC, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/mainboard/google/cyan/variants/celes/gpio.c b/src/mainboard/google/cyan/variants/celes/gpio.c index ebb7717cc1..10ca3b0167 100644 --- a/src/mainboard/google/cyan/variants/celes/gpio.c +++ b/src/mainboard/google/cyan/variants/celes/gpio.c @@ -164,7 +164,7 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ GPIO_NC, /* 19 GPIO_SUS1 */ diff --git a/src/mainboard/google/cyan/variants/cyan/gpio.c b/src/mainboard/google/cyan/variants/cyan/gpio.c index 340a8af78b..62fcb5e64c 100644 --- a/src/mainboard/google/cyan/variants/cyan/gpio.c +++ b/src/mainboard/google/cyan/variants/cyan/gpio.c @@ -162,9 +162,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_NC, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/mainboard/google/cyan/variants/edgar/gpio.c b/src/mainboard/google/cyan/variants/edgar/gpio.c index 779b3365a6..97e2dd18cf 100644 --- a/src/mainboard/google/cyan/variants/edgar/gpio.c +++ b/src/mainboard/google/cyan/variants/edgar/gpio.c @@ -161,7 +161,7 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ GPIO_NC, /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ diff --git a/src/mainboard/google/cyan/variants/kefka/gpio.c b/src/mainboard/google/cyan/variants/kefka/gpio.c index 00a6e2669c..8340f1acaa 100644 --- a/src/mainboard/google/cyan/variants/kefka/gpio.c +++ b/src/mainboard/google/cyan/variants/kefka/gpio.c @@ -161,9 +161,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_NC, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/mainboard/google/cyan/variants/reks/gpio.c b/src/mainboard/google/cyan/variants/reks/gpio.c index eac413ba71..74792bdc28 100644 --- a/src/mainboard/google/cyan/variants/reks/gpio.c +++ b/src/mainboard/google/cyan/variants/reks/gpio.c @@ -163,9 +163,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_NC, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/mainboard/google/cyan/variants/relm/gpio.c b/src/mainboard/google/cyan/variants/relm/gpio.c index 8bd911c18e..6b75a84150 100644 --- a/src/mainboard/google/cyan/variants/relm/gpio.c +++ b/src/mainboard/google/cyan/variants/relm/gpio.c @@ -164,9 +164,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_NC, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/mainboard/google/cyan/variants/setzer/gpio.c b/src/mainboard/google/cyan/variants/setzer/gpio.c index 2278200e81..a1564c1bbe 100644 --- a/src/mainboard/google/cyan/variants/setzer/gpio.c +++ b/src/mainboard/google/cyan/variants/setzer/gpio.c @@ -162,9 +162,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_NC, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/mainboard/google/cyan/variants/terra/gpio.c b/src/mainboard/google/cyan/variants/terra/gpio.c index 8c87916219..3f5c19d782 100644 --- a/src/mainboard/google/cyan/variants/terra/gpio.c +++ b/src/mainboard/google/cyan/variants/terra/gpio.c @@ -160,7 +160,7 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ GPIO_NC, /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ diff --git a/src/mainboard/google/cyan/variants/ultima/gpio.c b/src/mainboard/google/cyan/variants/ultima/gpio.c index 94e50663a2..4e4f0f637c 100644 --- a/src/mainboard/google/cyan/variants/ultima/gpio.c +++ b/src/mainboard/google/cyan/variants/ultima/gpio.c @@ -163,9 +163,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_NC, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/mainboard/google/cyan/variants/wizpig/gpio.c b/src/mainboard/google/cyan/variants/wizpig/gpio.c index ee94ac46ce..cadaf02b47 100644 --- a/src/mainboard/google/cyan/variants/wizpig/gpio.c +++ b/src/mainboard/google/cyan/variants/wizpig/gpio.c @@ -162,9 +162,9 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */ GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA), /* 17 GPIO_SUS3 */ - GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ - GPI(trig_edge_low, L3, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), + GPI(trig_level_low, L1, P_1K_H, 0, NA, UNMASK_WAKE, NA), /* 19 GPIO_SUS1 */ GPIO_NC, /* 20 GPIO_SUS5 */ GPIO_INPUT_NO_PULL, /* 21 SEC_GPIO_SUS11 */ diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h index 294f176676..6b382fc171 100644 --- a/src/soc/intel/braswell/include/soc/gpio.h +++ b/src/soc/intel/braswell/include/soc/gpio.h @@ -524,10 +524,11 @@ typedef enum { typedef enum { INT_DIS = 0, - trig_edge_low = 1, - trig_edge_high = 2, - trig_edge_both = 3, - trig_level = 4, + trig_edge_low = PAD_TRIG_EDGE_LOW, + trig_edge_high = PAD_TRIG_EDGE_HIGH, + trig_edge_both = PAD_TRIG_EDGE_BOTH, + trig_level_high = PAD_TRIG_EDGE_LEVEL | (0 << 4), + trig_level_low = PAD_TRIG_EDGE_LEVEL | (4 << 4), } int_type_t; typedef enum { -- cgit v1.2.3