From 73a22edcc8894c34df1234ae02d5318f18e3f7b8 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 5 Apr 2021 12:26:51 +0200 Subject: soc/intel: Fix typo in comment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit rotine ---> routine Change-Id: I21a71f52d2ec7a05ea3dadf30e8f3e8dac07d168 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52106 Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer Reviewed-by: Michael Niewöhner --- src/soc/intel/cannonlake/gpio_common.c | 2 +- src/soc/intel/elkhartlake/chip.c | 2 +- src/soc/intel/icelake/chip.c | 2 +- src/soc/intel/jasperlake/chip.c | 2 +- src/soc/intel/tigerlake/chip.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src') diff --git a/src/soc/intel/cannonlake/gpio_common.c b/src/soc/intel/cannonlake/gpio_common.c index 21a5801648..2c2dcdbabd 100644 --- a/src/soc/intel/cannonlake/gpio_common.c +++ b/src/soc/intel/cannonlake/gpio_common.c @@ -5,7 +5,7 @@ /* * Routine to perform below operations: - * 1. SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register + * 1. SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register * 2. Program GPIO PM configuration based on PM mask and value */ void soc_gpio_pm_configuration(void) diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c index b14edd6cc6..3917ea0af8 100644 --- a/src/soc/intel/elkhartlake/chip.c +++ b/src/soc/intel/elkhartlake/chip.c @@ -98,7 +98,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index 821a9e04ed..32b1830096 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -88,7 +88,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c index 1051fbc9ab..ea29fd8b43 100644 --- a/src/soc/intel/jasperlake/chip.c +++ b/src/soc/intel/jasperlake/chip.c @@ -104,7 +104,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c index 2a0d7d0326..1affcce078 100644 --- a/src/soc/intel/tigerlake/chip.c +++ b/src/soc/intel/tigerlake/chip.c @@ -109,7 +109,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; -- cgit v1.2.3