From 6f9e817bbfd634123b14611ddcb53472bc08783e Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 29 Sep 2022 16:13:26 +0200 Subject: soc/amd/common/block/lpc/espi_util: use [read,write][8,16,32]p Also include arch/mmio via device/mmio.h and not directly to have the [read,write][8,16,32]p helper functions available. Signed-off-by: Felix Held Change-Id: I51c6f5c73b41546b304f16994d517ed15dbb555f Reviewed-on: https://review.coreboot.org/c/coreboot/+/67980 Reviewed-by: Raul Rangel Reviewed-by: Fred Reitberger Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas --- src/soc/amd/common/block/lpc/espi_util.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src') diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index c80734d6a2..4fc050b0ee 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -3,7 +3,7 @@ #include #include #include -#include +#include #include #include #include @@ -32,32 +32,32 @@ static uintptr_t espi_get_bar(void) static uint32_t espi_read32(unsigned int reg) { - return read32((void *)(espi_get_bar() + reg)); + return read32p(espi_get_bar() + reg); } static void espi_write32(unsigned int reg, uint32_t val) { - write32((void *)(espi_get_bar() + reg), val); + write32p(espi_get_bar() + reg, val); } static uint16_t espi_read16(unsigned int reg) { - return read16((void *)(espi_get_bar() + reg)); + return read16p(espi_get_bar() + reg); } static void espi_write16(unsigned int reg, uint16_t val) { - write16((void *)(espi_get_bar() + reg), val); + write16p(espi_get_bar() + reg, val); } static uint8_t espi_read8(unsigned int reg) { - return read8((void *)(espi_get_bar() + reg)); + return read8p(espi_get_bar() + reg); } static void espi_write8(unsigned int reg, uint8_t val) { - write8((void *)(espi_get_bar() + reg), val); + write8p(espi_get_bar() + reg, val); } static inline uint32_t espi_decode_io_range_en_bit(unsigned int idx) -- cgit v1.2.3