From 6f15ba0112c693c129d0425c19af4de6b9231f8a Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 2 May 2018 18:49:20 +0200 Subject: mainboard/hp/dl145_g1: Remove commented code Change-Id: I4528eb064e8b9c5ebb235ca16e13582df9efd4cd Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/25990 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/hp/dl145_g1/acpi_tables.c | 45 --------------------------------- src/mainboard/hp/dl145_g1/romstage.c | 5 ---- 2 files changed, 50 deletions(-) (limited to 'src') diff --git a/src/mainboard/hp/dl145_g1/acpi_tables.c b/src/mainboard/hp/dl145_g1/acpi_tables.c index 1b4ada174b..ca6cea0ff4 100644 --- a/src/mainboard/hp/dl145_g1/acpi_tables.c +++ b/src/mainboard/hp/dl145_g1/acpi_tables.c @@ -62,51 +62,6 @@ unsigned long acpi_fill_madt(unsigned long current) } } - /* - int i; - int j = 0; - - for(i = 1; i< sysconf.hc_possible_num; i++) { - unsigned d = 0; - if(!(sysconf.pci1234[i] & 0x1) ) continue; - // 8131 need to use +4 - - switch (sysconf.hcid[i]) { - case 1: - d = 7; - break; - case 3: - d = 4; - break; - } - switch (sysconf.hcid[i]) { - case 1: - case 3: - dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][0], - res->base, gsi_base ); - gsi_base+=d; - } - } - dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][1], - res->base, gsi_base ); - gsi_base+=d; - - } - } - break; - } - - j++; - } - */ } diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index 1ef3658a62..e991dc6bda 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -125,7 +125,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); setup_dl145g1_resource_map(); - //setup_default_resource_map(); setup_coherent_ht_domain(); wait_all_core0_started(); @@ -180,10 +179,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) for (i = RC0; i <= RC1; i <<= 1) change_i2c_mux(i); - //dump_spd_registers(&sysinfo->ctrl[0]); - //dump_spd_registers(&sysinfo->ctrl[1]); - //dump_smbus_registers(); - allow_all_aps_stop(bsp_apicid); //It's the time to set ctrl now; -- cgit v1.2.3