From 6f0e6fa6e125a7919a6b7836fa119e0074dca250 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 9 Feb 2016 09:40:39 -0800 Subject: skylake: Finalize SMM in coreboot Once we lock down the SPI BAR we need to tell SMM to re-init its SPI driver or it will be unable to write ELOG events via SMI. This SMI is also sent at the end of depthcharge so there was just a window where SMI events could get lost. BUG=chrome-os-partner:50076 BRANCH=glados TEST=enable DEBUG_SMI, boot to dev screen, press power button and see elog events get added without without transaction errors. Change-Id: I1f14717b5e7f29c158dde8fd308bdbfb67eba41a Signed-off-by: Patrick Georgi Original-Commit-Id: 60ca24c760c70e2ebe5f3e68f95d3ffdba0fef9e Original-Change-Id: I4e323249f00954e290a6a30f515e34632681bfdd Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/326861 Original-Reviewed-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/13697 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/skylake/finalize.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src') diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index 5eef66dbbb..6edec1ffd8 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -210,6 +210,9 @@ static void soc_finalize(void *unused) soc_lockdown(); + printk(BIOS_DEBUG, "Finalizing SMM.\n"); + outb(APM_CNT_FINALIZE, APM_CNT); + /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); } -- cgit v1.2.3