From 6be8a5138a193431d873c24f0b79e699d5b23eb6 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Tue, 25 May 2021 13:42:28 +0200 Subject: mb/siemens/{mc_apl2,...,mc_apl6}: Do early UART pad configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With commit 405f229689 (soc/intel/*: drop UART pad configuration from common code) the UART pad configuration was dropped from common SoC code. Through a second commit 5ff17ed393 (mb/siemens/mc_apl1: do UART pad configuration at board-level) the UART pad configuration was made for mc_apl1 baseboard. This change is also needed for all other mc_apl boards. Change-Id: If78726d9b141e4e7580cca3267f49c1a5b95d7fa Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/54911 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Michael Niewöhner --- src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c | 3 +++ src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c | 3 +++ src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c | 4 ++++ src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c | 3 +++ src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c | 3 +++ 5 files changed, 16 insertions(+) (limited to 'src') diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c index 4bf4bb5235..c94bfb835b 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c @@ -528,6 +528,9 @@ const struct pad_config *variant_gpio_table(size_t *num) /* GPIOs needed prior to ramstage. */ static const struct pad_config early_gpio_table[] = { + /* UART */ + PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */ + PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */ /* Not connected */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_0, DN_20K, PWROK, NF1, HIZCRx0, SAME), diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c index 40f8e18cb4..8ab0a93f14 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c @@ -357,6 +357,9 @@ const struct pad_config *variant_gpio_table(size_t *num) /* GPIOs needed prior to ramstage. */ static const struct pad_config early_gpio_table[] = { + /* UART */ + PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */ + PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */ /* Debug tracing. */ PAD_CFG_GPI(GPIO_0, DN_20K, DEEP), /* TRACE_0_CLK_VNN */ diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c index 6b4897b88c..32bc61bf05 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c @@ -337,6 +337,10 @@ const struct pad_config *variant_gpio_table(size_t *num) /* GPIOs needed prior to ramstage. */ static const struct pad_config early_gpio_table[] = { + /* UART */ + PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */ + PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */ + /* Southwest Community */ /* Multiplexed I2C7 */ diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c index 04e04dbb80..17958a708f 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c @@ -357,6 +357,9 @@ const struct pad_config *variant_gpio_table(size_t *num) /* GPIOs needed prior to ramstage. */ static const struct pad_config early_gpio_table[] = { + /* UART */ + PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */ + PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */ /* Debug tracing. */ PAD_CFG_GPI(GPIO_0, DN_20K, DEEP), /* TRACE_0_CLK_VNN */ diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c index 081a9cff5b..8b056cb303 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c @@ -357,6 +357,9 @@ const struct pad_config *variant_gpio_table(size_t *num) /* GPIOs needed prior to ramstage. */ static const struct pad_config early_gpio_table[] = { + /* UART */ + PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */ + PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */ /* Debug tracing. */ PAD_CFG_GPI(GPIO_0, DN_20K, DEEP), /* TRACE_0_CLK_VNN */ -- cgit v1.2.3