From 693f4a417984849cdb68d176ca162f477275ac3f Mon Sep 17 00:00:00 2001 From: CK Hu Date: Thu, 13 Aug 2020 14:49:10 +0800 Subject: mb/google/asurada: Fixup BOOT_DEVICE_SPI_FLASH_BUS default value On MT8192 the SPI flash is actually using a SPI-NOR controller with its own bus. The number here should be a virtual value as (SPI_BUS_NUMBER + 1). Signed-off-by: CK Hu Change-Id: Ibc269201a34968c8400d2235e8da2ecd88114975 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44452 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin Reviewed-by: Yu-Ping Wu --- src/mainboard/google/asurada/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/mainboard/google/asurada/Kconfig b/src/mainboard/google/asurada/Kconfig index e1c96f090c..f5ffb3ccf3 100644 --- a/src/mainboard/google/asurada/Kconfig +++ b/src/mainboard/google/asurada/Kconfig @@ -41,9 +41,11 @@ config DRIVER_TPM_SPI_BUS hex default 0x0 +# On MT8192 the SPI flash is actually using a SPI-NOR controller with its own bus. +# The number here should be a virtual value as (SPI_BUS_NUMBER + 1). config BOOT_DEVICE_SPI_FLASH_BUS int - default 1 + default 9 config EC_GOOGLE_CHROMEEC_SPI_BUS hex -- cgit v1.2.3