From 6812626382548691e1b7c4828175859ee3fd0144 Mon Sep 17 00:00:00 2001
From: Martin Roth <martin@coreboot.org>
Date: Wed, 15 Jul 2020 10:05:33 -0600
Subject: soc/amd/stoneyridge: Remove unused SPI #defines

These #defines are not used, and conflict with #defines in
amdblocks/spi.h

BUG=None
TEST=Build stoney platforms

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I29b77a6b21a4deda6f28f5b057988cf3921540e2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
---
 src/soc/amd/stoneyridge/include/soc/southbridge.h | 2 --
 1 file changed, 2 deletions(-)

(limited to 'src')

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 601ceaddec..80c258f442 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -255,8 +255,6 @@
 #define   SPI_FIFO_PTR_CLR		BIT(20)
 #define   SPI_ARB_ENABLE		BIT(19)
 #define   EXEC_OPCODE			BIT(16)
-#define SPI_FIFO			0x80
-#define   SPI_FIFO_DEPTH		(0xc7 - SPI_FIFO)
 
 #define SPI100_ENABLE			0x20
 #define   SPI_USE_SPI100		BIT(0)
-- 
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