From 670462c7c62a8df829e5d370f3cb59e5b6928b93 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Tue, 24 Aug 2021 11:23:31 +0200 Subject: mb/siemens/mc_ehl2: Update SPD for DDR4 devices Since this variant uses different DDR4 devices compared to mc_ehl1 in a memory down configuration, the SPD data file must be adapted. In a first configuration we use Micron MT53D512M32D2NP modules. Following values were adjusted according to this board characteristic and with help of Serial Presence Detect (SPD) for LPDDR3 and LPDDR4 SDRAM Modules JEDEC Spec and the Specification for this Micron modules itself: - SPD Byte 4 - only 4Gb density instead of 8Gb for mc_ehl1 - SPD Byte 5 - different Row and Column Address Bits - SPD Byte 29/30 - 4Gb LPDDR4 needs 130ns tRFCab - SPD Byte 31/32 - 4Gb LPDDR4 needs 60ns tRFCpb Change-Id: Icb25f418952f0c96117140863d0d9c897d814ac5 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/58111 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- src/mainboard/siemens/mc_ehl/variants/mc_ehl2/spd/mc_ehl2.spd.hex | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/spd/mc_ehl2.spd.hex b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/spd/mc_ehl2.spd.hex index 71e5456542..eff68b3a38 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/spd/mc_ehl2.spd.hex +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/spd/mc_ehl2.spd.hex @@ -1,6 +1,6 @@ -23 11 11 0E 15 21 90 08 00 40 00 00 02 22 00 00 -00 00 04 0F 92 54 05 00 87 00 90 A8 90 C0 08 60 -04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +23 11 11 0E 14 19 90 08 00 40 00 00 02 22 00 00 +00 00 04 0F 92 54 05 00 87 00 90 A8 90 10 04 E0 +01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -- cgit v1.2.3