From 65c0655881752ddf551b44e3c3261605e74081e5 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 30 Mar 2022 19:39:06 +0200 Subject: soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls Since Sabrina uses the image slot header (ISH) that depends on the AMD A/B recovery scheme that depends on the multi-level PSP directory support, the multi-level support gets automatically selected by passing Sabrina as SoC name to amdfwtool, so passing the --multilevel command line switch to amdfwtool isn't needed. TEST=Timeless build results in identical binary for chausie Signed-off-by: Felix Held Change-Id: I98154d5b47daca6ae7952ffd3175d98ea3e01845 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63235 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Paul Menzel --- src/soc/amd/sabrina/Makefile.inc | 3 --- 1 file changed, 3 deletions(-) (limited to 'src') diff --git a/src/soc/amd/sabrina/Makefile.inc b/src/soc/amd/sabrina/Makefile.inc index b5045899d0..b7b538e193 100644 --- a/src/soc/amd/sabrina/Makefile.inc +++ b/src/soc/amd/sabrina/Makefile.inc @@ -232,7 +232,6 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ --location $(shell printf "%#x" $(SABRINA_FWM_POSITION)) \ - --multilevel \ --output $@ $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) @@ -250,7 +249,6 @@ $(obj)/amdfw_a.rom: $(obj)/amdfw.rom $(OPT_APOB_NV_BASE) \ --location $(shell printf "%#x" $(SABRINA_FW_A_POSITION)) \ --anywhere \ - --multilevel \ --output $@ $(obj)/amdfw_b.rom: $(obj)/amdfw.rom @@ -262,7 +260,6 @@ $(obj)/amdfw_b.rom: $(obj)/amdfw.rom $(OPT_APOB_NV_BASE) \ --location $(shell printf "%#x" $(SABRINA_FW_B_POSITION)) \ --anywhere \ - --multilevel \ --output $@ -- cgit v1.2.3