From 62eb94c9d3fe66b8fc0160d4a1290f6223e2f27a Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 7 Nov 2022 08:34:41 +0100 Subject: nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree Change-Id: I9dd254eddc12966154776d8a2d43f002567e758f Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/69290 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/lenovo/t410/devicetree.cb | 2 ++ src/mainboard/lenovo/x201/devicetree.cb | 2 ++ src/mainboard/packardbell/ms2290/devicetree.cb | 2 ++ src/northbridge/intel/ironlake/northbridge.c | 15 ++------------- 4 files changed, 8 insertions(+), 13 deletions(-) (limited to 'src') diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb index 63f4af2f2f..4631b8e0e0 100644 --- a/src/mainboard/lenovo/t410/devicetree.cb +++ b/src/mainboard/lenovo/t410/devicetree.cb @@ -18,12 +18,14 @@ chip northbridge/intel/ironlake register "gpu_pch_backlight" = "0x061a061a" device cpu_cluster 0 on + ops ironlake_cpu_bus_ops chip cpu/intel/model_2065x device lapic 0 on end end end device domain 0 on + ops ironlake_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2193 end diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index effe4ef261..73b043720b 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -19,12 +19,14 @@ chip northbridge/intel/ironlake register "gpu_pch_backlight" = "0x061a061a" device cpu_cluster 0 on + ops ironlake_cpu_bus_ops chip cpu/intel/model_2065x device lapic 0 on end end end device domain 0 on + ops ironlake_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2193 end diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb index 57d2dd745a..b49f4d57b7 100644 --- a/src/mainboard/packardbell/ms2290/devicetree.cb +++ b/src/mainboard/packardbell/ms2290/devicetree.cb @@ -19,12 +19,14 @@ chip northbridge/intel/ironlake register "gpu_pch_backlight" = "0x061a061a" device cpu_cluster 0 on + ops ironlake_cpu_bus_ops chip cpu/intel/model_2065x device lapic 0 on end end end device domain 0 on + ops ironlake_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x1025 0x0379 end diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index fbad6d40a7..4935ea95c9 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -75,7 +75,7 @@ static const char *northbridge_acpi_name(const struct device *dev) } #endif -static struct device_operations pci_domain_ops = { +struct device_operations ironlake_pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, .scan_bus = pci_domain_scan_bus, @@ -217,24 +217,13 @@ static const struct pci_driver mc_driver_ilk __pci_driver = { .devices = pci_device_ids, }; -static struct device_operations cpu_bus_ops = { +struct device_operations ironlake_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, }; -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) { - dev->ops = &pci_domain_ops; - } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { - dev->ops = &cpu_bus_ops; - } -} - struct chip_operations northbridge_intel_ironlake_ops = { CHIP_NAME("Intel Ironlake integrated Northbridge") - .enable_dev = enable_dev, .init = ironlake_init, }; -- cgit v1.2.3