From 5f20e85ff3138a0c355cc2f136e7fc02ecd6aa17 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Fri, 16 Apr 2021 15:48:58 +0900 Subject: mb/google/dedede/var/sasuke: Update DPTF parameters Add control charging current from TSR0 and correct charger_perf table value. BUG=b:179067801 BRANCH=dedede TEST=emerge-dedede coreboot Change-Id: Ie0d969898defe76952e5c136fa93b7edffe51de3 Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/c/coreboot/+/52408 Tested-by: build bot (Jenkins) Reviewed-by: Sumeet R Pawnikar Reviewed-by: Edward Doan --- src/mainboard/google/dedede/variants/sasuke/overridetree.cb | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/dedede/variants/sasuke/overridetree.cb b/src/mainboard/google/dedede/variants/sasuke/overridetree.cb index 6bcde70922..491de2f350 100644 --- a/src/mainboard/google/dedede/variants/sasuke/overridetree.cb +++ b/src/mainboard/google/dedede/variants/sasuke/overridetree.cb @@ -86,7 +86,7 @@ chip soc/intel/jasperlake register "options.tsr[1].desc" = ""Vcore"" register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 60, 60000), + [1] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 60, 60000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 60, 15000), }" register "policies.critical" = "{ @@ -112,9 +112,9 @@ chip soc/intel/jasperlake }" register "controls.charger_perf" = "{ [0] = { 255, 3000 }, - [1] = { 24, 2500 }, - [2] = { 16, 2000 }, - [3] = { 8, 1500 } + [1] = { 39, 2500 }, + [2] = { 31, 2000 }, + [3] = { 23, 1500 } }" device generic 0 on end end -- cgit v1.2.3