From 5a359365b9ba0e4868f3d15f25d60c6cb321cada Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Thu, 21 Apr 2016 01:34:03 -0500 Subject: nb/amd/mct_ddr3: Enhance debugging around MEMCLK frequency change Change-Id: I5056cf885b7063a97c095bfaaf01dd8da777a425 Signed-off-by: Timothy Pearson Reviewed-on: https://review.coreboot.org/14447 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand Reviewed-by: Martin Roth --- src/northbridge/amd/amdmct/mct_ddr3/mctwl.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c index b354d923f8..44ea6e8f84 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2010 Advanced Micro Devices, Inc. - * Copyright (C) 2015 Timothy Pearson , Raptor Engineering + * Copyright (C) 2015 - 2016 Raptor Engineering, LLC * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -358,9 +358,13 @@ void SetTargetFreq(struct MCTStatStruc *pMCTstat, uint32_t dword; uint8_t package_type = mctGet_NVbits(NV_PACK_TYPE); + printk(BIOS_DEBUG, "%s: Start\n", __func__); + struct DCTStatStruc *pDCTstat; pDCTstat = pDCTstatA + Node; + printk(BIOS_DEBUG, "%s: Node %d: New frequency code: %04x\n", __func__, Node, pDCTstat->TargetFreq); + if (is_fam15h()) { /* Program F2x[1, 0]90[DisDllShutDownSR]=1. */ if (pDCTstat->DIMMValidDCT[0]) { @@ -448,6 +452,8 @@ void SetTargetFreq(struct MCTStatStruc *pMCTstat, FreqChgCtrlWrd(pMCTstat, pDCTstat, 1); } } + + printk(BIOS_DEBUG, "%s: Done\n", __func__); } static void Modify_OnDimmMirror(struct DCTStatStruc *pDCTstat, u8 dct, u8 set) -- cgit v1.2.3