From 5a157176dd8787aed39a8d14691ba536bee08dcf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 1 Jul 2019 10:12:45 +0300 Subject: cpu/x86/lapic: Refactor timer_fsb() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Common apic_timer code in cpu/x86 should not depend on intel header files. Change-Id: Ib099921d4b8e561daea47219385762bb00fc4548 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34091 Reviewed-by: Arthur Heymans Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/cpu/intel/common/fsb.c | 29 ++++++++++++++++++++++++----- src/cpu/x86/lapic/apic_timer.c | 39 --------------------------------------- src/include/cpu/intel/fsb.h | 10 +--------- src/include/delay.h | 11 +++++++++++ 4 files changed, 36 insertions(+), 53 deletions(-) (limited to 'src') diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c index d66e87a396..2d86abd929 100644 --- a/src/cpu/intel/common/fsb.c +++ b/src/cpu/intel/common/fsb.c @@ -11,12 +11,16 @@ * GNU General Public License for more details. */ +#include #include #include #include #include #include #include +#include + +static u32 g_timer_fsb CAR_GLOBAL; static int get_fsb(void) { @@ -67,16 +71,31 @@ static int get_fsb(void) return ret; } -int get_ia32_fsb(void) +static int set_timer_fsb(void) { - int ret; + int ret = get_fsb(); - ret = get_fsb(); + if (ret > 0) { + car_set_var(g_timer_fsb, ret); + return 0; + } if (ret == -1) printk(BIOS_ERR, "FSB not found\n"); if (ret == -2) printk(BIOS_ERR, "CPU not supported\n"); - return ret; + return -1; +} + +u32 get_timer_fsb(void) +{ + u32 fsb; + + fsb = car_get_var(g_timer_fsb); + if (fsb > 0) + return fsb; + + set_timer_fsb(); + return car_get_var(g_timer_fsb); } /** @@ -87,7 +106,7 @@ int get_ia32_fsb(void) */ int get_ia32_fsb_x3(void) { - const int fsb = get_ia32_fsb(); + const int fsb = get_timer_fsb(); if (fsb > 0) return 100 * DIV_ROUND_CLOSEST(3 * fsb, 100); diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c index 83521b7230..58836b5e3f 100644 --- a/src/cpu/x86/lapic/apic_timer.c +++ b/src/cpu/x86/lapic/apic_timer.c @@ -17,44 +17,8 @@ #include #include #include -#include #include #include -#include - -/* NOTE: This code uses global variables, so it can not be used during - * memory init. - */ - -#if CONFIG_UDELAY_LAPIC_FIXED_FSB != 0 -static inline u32 get_timer_fsb(void) -{ - return CONFIG_UDELAY_LAPIC_FIXED_FSB; -} - -static int set_timer_fsb(void) -{ - return 0; -} -#else -static u32 g_timer_fsb CAR_GLOBAL; - -static int set_timer_fsb(void) -{ - int ia32_fsb = get_ia32_fsb(); - - if (ia32_fsb > 0) { - car_set_var(g_timer_fsb, ia32_fsb); - return 0; - } - return -1; -} - -static inline u32 get_timer_fsb(void) -{ - return car_get_var(g_timer_fsb); -} -#endif void init_timer(void) { @@ -66,9 +30,6 @@ void init_timer(void) /* Set the initial counter to 0xffffffff */ lapic_write(LAPIC_TMICT, 0xffffffff); - - /* Set FSB frequency to a reasonable value */ - set_timer_fsb(); } void udelay(u32 usecs) diff --git a/src/include/cpu/intel/fsb.h b/src/include/cpu/intel/fsb.h index 49f3b17aae..825cdd5761 100644 --- a/src/include/cpu/intel/fsb.h +++ b/src/include/cpu/intel/fsb.h @@ -15,15 +15,7 @@ #define CPU_INTEL_FSB_H /* - * This function returns: - * the system bus speed value in MHz - * -1 if FSB is not found - * -2 if the CPU is not supported - */ -int get_ia32_fsb(void); - -/* - * This function returns round up 3 * get_ia32_fsb() + * This function returns round up 3 * get_timer_fsb() */ int get_ia32_fsb_x3(void); diff --git a/src/include/delay.h b/src/include/delay.h index 8f894d2d30..1c481be917 100644 --- a/src/include/delay.h +++ b/src/include/delay.h @@ -1,6 +1,17 @@ #ifndef DELAY_H #define DELAY_H +#include + +#if CONFIG_UDELAY_LAPIC_FIXED_FSB != 0 +static inline u32 get_timer_fsb(void) +{ + return CONFIG_UDELAY_LAPIC_FIXED_FSB; +} +#else +u32 get_timer_fsb(void); +#endif + void init_timer(void); void udelay(unsigned int usecs); -- cgit v1.2.3