From 54cba3b4ad743340de7462e0e5dcec76ee73baed Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Sat, 23 Jun 2012 17:02:29 -0700 Subject: SMM: Skip locking SPI registers in finalize step This is a temporary workaround so the SPI bus can be accessed at runtime in SMM code until the SPI opcode menu is used properly. Change-Id: I93d188c55b66d8dce49fa91a1de53ee195944b30 Signed-off-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/1318 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/southbridge/intel/bd82x6x/finalize.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src') diff --git a/src/southbridge/intel/bd82x6x/finalize.c b/src/southbridge/intel/bd82x6x/finalize.c index ed1ebf7a9a..d62600f693 100644 --- a/src/southbridge/intel/bd82x6x/finalize.c +++ b/src/southbridge/intel/bd82x6x/finalize.c @@ -31,8 +31,11 @@ void intel_pch_finalize_smm(void) RCBA32(0x3898) = SPI_OPMENU_LOWER; RCBA32(0x389c) = SPI_OPMENU_UPPER; +/* Need to fix SMI driver use of opcode menu */ +#if !CONFIG_ELOG_GSMI /* Lock SPIBAR */ RCBA32_OR(0x3804, (1 << 15)); +#endif /* TCLOCKDN: TC Lockdown */ RCBA32_OR(0x0050, (1 << 31)); -- cgit v1.2.3