From 4eb17f8e20aa832035945c15a90b0209b837ebae Mon Sep 17 00:00:00 2001 From: Tracy Wu Date: Tue, 9 Nov 2021 14:23:11 +0800 Subject: soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDs List of changes: 1. Add PEG60/10/62 IDs (0x464d/0x460d/0x463d) into device/pci_ids.h 2. Add these new IDs into pcie_device_ids[] in pcie.c BUG=b:205668996 TEST=Build and check fsp log to confirm the settings are set properly. Signed-off-by: Tracy Wu Change-Id: Idc8a09b0579e1e6053ed2e35b7556a180a5f0088 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59081 Tested-by: build bot (Jenkins) Reviewed-by: Kane Chen Reviewed-by: Tim Wawrzynczak Reviewed-by: EricR Lai --- src/include/device/pci_ids.h | 4 ++++ src/soc/intel/common/block/pcie/pcie.c | 3 +++ 2 files changed, 7 insertions(+) (limited to 'src') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 1ed6ac9eda..c6ef12188f 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3332,6 +3332,10 @@ #define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6 0x4b3d #define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7 0x4b3e +#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP1 0x464d +#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP2 0x460d +#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP3 0x463d + #define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP1 0x51b8 #define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP2 0x51b9 #define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP3 0x51ba diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index 6d3d6ab50a..0c3e2250c7 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -313,6 +313,9 @@ static const unsigned short pcie_device_ids[] = { PCI_DEVICE_ID_INTEL_JSP_PCIE_RP6, PCI_DEVICE_ID_INTEL_JSP_PCIE_RP7, PCI_DEVICE_ID_INTEL_JSP_PCIE_RP8, + PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP1, + PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP2, + PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP3, PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP1, PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP2, PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP3, -- cgit v1.2.3