From 4e4938bcb96ee62cf1da6017592d5dfd4eb83dbf Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 12 Dec 2023 20:15:14 +0100 Subject: soc/amd/genoa/include/amd_pci_int_defs: rename PIRQ index 0x60 and 0x61 PIRQ_SCI is already defined as 0x10 and this also brings the definitions more in line with Phoenix. Signed-off-by: Felix Held Change-Id: Ib2ab954b379d2edd0167d7fb229557600cbc4e48 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79462 Tested-by: build bot (Jenkins) Reviewed-by: Varshit Pandya Reviewed-by: Martin L Roth --- src/soc/amd/genoa/include/soc/amd_pci_int_defs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h b/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h index 7d2bb39de0..b99ee413b3 100644 --- a/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h +++ b/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h @@ -38,8 +38,8 @@ #define PIRQ_GPP2 0x52 /* GPPInt2 */ #define PIRQ_GPP3 0x53 /* GPPInt3 */ /* 0x54-0x59 reserved */ -#define PIRQ_SCI 0x60 /* SCI Interrupt */ -#define PIRQ_SMI 0x61 /* SMI Interrupt */ +#define PIRQ_GSCI 0x60 /* SCI Interrupt */ +#define PIRQ_GSMI 0x61 /* SMI Interrupt */ #define PIRQ_GPIO 0x62 /* GPIO Interrupt */ /* 0x63-0x6f reserved */ #define PIRQ_I2C0 0x70 /* I2C0/I3C0 */ -- cgit v1.2.3