From 4c4f9161728f42f959b4394ba42aefb64e35afe2 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Mon, 11 Jan 2021 18:26:36 +0900 Subject: mb/google/dedede/var/sasuke: Disable PCIE RP8 and CLKSRC3 This change disables unused PCIE RP8 and CLKSRC3. Without this change sasuke cannot enter into s0ix properly. BUG=b:176862270 TEST=Built and verified entering s0ix Change-Id: I0828813ed7924669cb0ff97be2565579762c810f Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/c/coreboot/+/49300 Reviewed-by: Karthik Ramasubramanian Reviewed-by: Jamie Chen Tested-by: build bot (Jenkins) --- src/mainboard/google/dedede/variants/sasuke/overridetree.cb | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/mainboard/google/dedede/variants/sasuke/overridetree.cb b/src/mainboard/google/dedede/variants/sasuke/overridetree.cb index f4d385e614..57cfbc7c4f 100644 --- a/src/mainboard/google/dedede/variants/sasuke/overridetree.cb +++ b/src/mainboard/google/dedede/variants/sasuke/overridetree.cb @@ -1,4 +1,8 @@ chip soc/intel/jasperlake + # Disable PCIe Root Port 8 (index 7) + register "PcieRpEnable[7]" = "0" + # Disable PCIe Clock Source 4 (index 3) + register "PcieClkSrcUsage[3]" = "0xff" # USB Port Configuration register "usb2_ports[0]" = "{ @@ -107,7 +111,7 @@ chip soc/intel/jasperlake end end # I2C 0 device pci 15.2 on end - device pci 1c.7 on end + device pci 1c.7 off end # PCI Express Root Port 8 device pci 19.0 on chip drivers/i2c/da7219 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)" -- cgit v1.2.3