From 4b213a8d1fd02061c1e879ff98167bcb47f13bd2 Mon Sep 17 00:00:00 2001 From: Denis 'GNUtoo' Carikli Date: Thu, 28 Mar 2013 14:24:39 +0100 Subject: Intel i945: ACPI: Add _OSC method MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the ACPI Operating System Capabilities Method and let the operation system control everything. Commit »AMD Fam14 DSDT: Add OSC method« (00a0e76b) [1] is used as a template. The Lenovo X60 [2] running the Parabola GNU/Linux distribution [3] is used for testing. Before that change: $ dmesg | egrep -e OSC -e ASPM [ 0.108036] pci_root PNP0A08:00: ACPI _OSC support notification failed, disabling PCIe ASPM [ 0.108040] pci_root PNP0A08:00: Unable to request _OSC control (_OSC support mask: 0x08) [ 0.118089] ACPI _OSC control for PCIe not granted, disabling ASPM [ 16.874569] e1000e 0000:01:00.0: Disabling ASPM L0s L1 With that change: $ dmesg | egrep -e OSC -e ASPM [ 0.107962] pci_root PNP0A08:00: Requesting ACPI _OSC control (0x1d) [ 0.108003] pci_root PNP0A08:00: ACPI _OSC control (0x1d) granted [ 0.111052] pci 0000:01:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force' [ 17.537970] e1000e 0000:01:00.0: Disabling ASPM L0s L1 [1] http://review.coreboot.org/2738 [2] http://www.coreboot.org/Lenovo_x60x [3] https://parabolagnulinux.org/ Change-Id: I1caffa44eea447d553c01caaf431f2db241ea5ea Signed-off-by: Denis 'GNUtoo' Carikli Signed-off-by: Paul Menzel Reviewed-on: http://review.coreboot.org/2938 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/northbridge/intel/i945/acpi/i945.asl | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'src') diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl index 47a6931c67..6a34b94535 100644 --- a/src/northbridge/intel/i945/acpi/i945.asl +++ b/src/northbridge/intel/i945/acpi/i945.asl @@ -22,6 +22,25 @@ #include "hostbridge.asl" #include "../i945.h" +/* Operating System Capabilities Method */ +Method (_OSC, 4) +{ + // Create DWord-addressable fields from the Capabilities Buffer + CreateDWordField(Arg3, 0, CDW1) + CreateDWordField(Arg3, 4, CDW2) + CreateDWordField(Arg3, 8, CDW3) + + /* Check for proper PCI/PCIe UUID */ + If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + { + /* Let OS control everything */ + Return(Arg3) + } Else { + Or(CDW1, 4, CDW1) // Unrecognized UUID, so set bit 2 to 1 + Return(Arg3) + } +} + /* PCI Device Resource Consumption */ Device (PDRC) { -- cgit v1.2.3