From 4aa761616b38c63f0402c2a01cea26fdff6f78a7 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 8 Sep 2014 18:04:18 -0700 Subject: arm64: Make exceptions use the transition library Transition library acts as a common interface for handling exceptions. The only thing that needs to be implemented by exception.c is the exc_dispatch routine to handle the exceptions as required. BUG=chrome-os-partner:30785 BRANCH=None TEST=Compiles successfully and exceptions are tested using test_exc Change-Id: I90b4861909189adfe8449b9d4590965e6b743c00 Signed-off-by: Patrick Georgi Original-Commit-Id: b83c9404407dd4dd2dda4e4eaed0b443f0f58425 Original-Change-Id: Ibb643d7ea2f9aabbc66439549ea2168fd66ced5e Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://chromium-review.googlesource.com/217143 Original-Reviewed-by: Aaron Durbin Original-Tested-by: Furquan Shaikh Original-Commit-Queue: Furquan Shaikh Reviewed-on: http://review.coreboot.org/9071 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/arch/arm64/armv8/Makefile.inc | 3 - src/arch/arm64/armv8/exception.c | 41 +++++---- src/arch/arm64/armv8/exception_asm.S | 126 -------------------------- src/arch/arm64/include/armv8/arch/exception.h | 11 --- 4 files changed, 24 insertions(+), 157 deletions(-) delete mode 100644 src/arch/arm64/armv8/exception_asm.S (limited to 'src') diff --git a/src/arch/arm64/armv8/Makefile.inc b/src/arch/arm64/armv8/Makefile.inc index 61e37e68ae..52663b85c5 100644 --- a/src/arch/arm64/armv8/Makefile.inc +++ b/src/arch/arm64/armv8/Makefile.inc @@ -38,7 +38,6 @@ bootblock-$(CONFIG_ARM_BOOTBLOCK_NORMAL) += bootblock_normal.c bootblock-y += cache.c bootblock-y += cpu.S bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S bootblock-c-ccopts += $(armv8_flags) bootblock-S-ccopts += $(armv8_asm_flags) @@ -53,7 +52,6 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV8_64),y) romstage-y += cache.c romstage-y += cpu.S romstage-y += exception.c -romstage-y += exception_asm.S romstage-c-ccopts += $(armv8_flags) romstage-S-ccopts += $(armv8_asm_flags) @@ -71,7 +69,6 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV8_64),y) ramstage-y += cache.c ramstage-y += cpu.S ramstage-y += exception.c -ramstage-y += exception_asm.S ramstage-y += mmu.c ramstage-c-ccopts += $(armv8_flags) diff --git a/src/arch/arm64/armv8/exception.c b/src/arch/arm64/armv8/exception.c index d9a63c3a81..0aef0e5457 100644 --- a/src/arch/arm64/armv8/exception.c +++ b/src/arch/arm64/armv8/exception.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -80,24 +81,28 @@ static struct exception_handler_info exceptions[EXC_COUNT] = { [EXC_SERROR_ELX_32] = {"_serror_elx_32"}, }; -static void print_regs(struct exception_state *state) +static void print_regs(struct exc_state *exc_state) { int i; - uint64_t far_el3; - - far_el3 = raw_read_far_el3(); - - printk(BIOS_DEBUG, "ELR = 0x%016llx\n", state->elr); - printk(BIOS_DEBUG, "ESR = 0x%08llx\n", state->esr); - printk(BIOS_DEBUG, "FAR_EL3 = 0x%016llx\n", far_el3); - for (i = 0; i < 31; i++) - printk(BIOS_DEBUG, "X%02d = 0x%016llx\n", i, state->regs[i]); + struct elx_state *elx = &exc_state->elx; + struct regs *regs = &exc_state->regs; + + uint64_t elx_esr = raw_read_esr_current(); + uint64_t elx_far = raw_read_far_current(); + + printk(BIOS_DEBUG, "ELR = 0x%016llx\n", elx->elr); + printk(BIOS_DEBUG, "ESR = 0x%016llx\n", elx_esr); + printk(BIOS_DEBUG, "SPSR = 0x%08llx\n", elx->spsr); + printk(BIOS_DEBUG, "FAR = 0x%016llx\n", elx_far); + for (i = X0_INDEX; i < XMAX_INDEX; i++) + printk(BIOS_DEBUG, "X%02d = 0x%016llx\n", i, regs->x[i]); } -void exception_dispatch(struct exception_state *state, int idx) +void exc_dispatch(struct exc_state *exc_state, uint64_t idx) { if (idx >= EXC_COUNT) { - printk(BIOS_DEBUG, "Bad exception index %d.\n", idx); + printk(BIOS_DEBUG, "Bad exception index %lx.\n", + (unsigned long)idx); } else { struct exception_handler_info *info = &exceptions[idx]; @@ -106,14 +111,17 @@ void exception_dispatch(struct exception_state *state, int idx) else printk(BIOS_DEBUG, "exception _not_used.\n"); } - print_regs(state); + print_regs(exc_state); if (test_exc) { - state->elr += 4; + exc_state->elx.elr += 4; + raw_write_elr_current(exc_state->elx.elr); test_exc = 0; - printk(BIOS_DEBUG, "new ELR = 0x%016llx\n", state->elr); + printk(BIOS_DEBUG, "new ELR = 0x%016llx\n", exc_state->elx.elr); } else die("exception"); + + exc_exit(&exc_state->regs); } static uint64_t test_exception(void) @@ -129,8 +137,7 @@ static uint64_t test_exception(void) void exception_hwinit(void) { - extern void *exception_table; - set_vbar(&exception_table); + exc_set_vbar(); } void exception_init(void) diff --git a/src/arch/arm64/armv8/exception_asm.S b/src/arch/arm64/armv8/exception_asm.S deleted file mode 100644 index 66377235cd..0000000000 --- a/src/arch/arm64/armv8/exception_asm.S +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is part of the libpayload project. - * - * Copyright 2014 Google Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -.macro eentry lbl id - .align 7 -\lbl: - stp x30, xzr, [sp, #-16]! - bl exception_prologue - mov x1, \id - bl exception_handler -.endm - - .align 11 - .global exception_table - -exception_table: - -eentry sync_el3_sp0,#0 -eentry irq_el3_sp0,#1 -eentry fiq_el3_sp0,#2 -eentry serror_el3_sp0,#3 -eentry sync_el3_sp3,#4 -eentry irq_el3_sp3,#5 -eentry fiq_el3_sp3,#6 -eentry serror_el3_sp3,#7 -eentry sync_elx_64,#8 -eentry irq_elx_64,#9 -eentry fiq_elx_64,#10 -eentry serror_elx_64,#11 -eentry sync_elx_32,#12 -eentry irq_elx_32,#13 -eentry fiq_elx_32,#14 -eentry serror_elx_32,#15 - -exception_prologue: - /* Save all registers x0-x29 */ - stp x28, x29, [sp, #-16]! - stp x26, x27, [sp, #-16]! - stp x24, x25, [sp, #-16]! - stp x22, x23, [sp, #-16]! - stp x20, x21, [sp, #-16]! - stp x18, x19, [sp, #-16]! - stp x16, x17, [sp, #-16]! - stp x14, x15, [sp, #-16]! - stp x12, x13, [sp, #-16]! - stp x10, x11, [sp, #-16]! - stp x8, x9, [sp, #-16]! - stp x6, x7, [sp, #-16]! - stp x4, x5, [sp, #-16]! - stp x2, x3, [sp, #-16]! - stp x0, x1, [sp, #-16]! - - /* Save the exception reason on stack */ - mrs x1, esr_el3 - - /* Save the return address on stack */ - mrs x0, elr_el3 - stp x0, x1, [sp, #-16]! - - ret - -exception_handler: - /* Save address of saved registers into x0 - * This acts as first argument to exception_dispatch - */ - mov x0, sp - bl exception_dispatch - - /* Pop return address and exception reason saved on stack */ - ldp x0, x1, [sp], #16 - msr elr_el3, x0 - msr esr_el3, x1 - /* Pop registers x0-x30 */ - ldp x0, x1, [sp], #16 - ldp x2, x3, [sp], #16 - ldp x4, x5, [sp], #16 - ldp x6, x7, [sp], #16 - ldp x8, x9, [sp], #16 - ldp x10, x11, [sp], #16 - ldp x12, x13, [sp], #16 - ldp x14, x15, [sp], #16 - ldp x16, x17, [sp], #16 - ldp x18, x19, [sp], #16 - ldp x20, x21, [sp], #16 - ldp x22, x23, [sp], #16 - ldp x24, x25, [sp], #16 - ldp x26, x27, [sp], #16 - ldp x28, x29, [sp], #16 - ldp x30, xzr, [sp], #16 - eret - - .global set_vbar -set_vbar: - /* Initialize the exception table address in vbar for EL3 */ - msr vbar_el3, x0 - dsb sy - isb - ret diff --git a/src/arch/arm64/include/armv8/arch/exception.h b/src/arch/arm64/include/armv8/arch/exception.h index abb80931e6..11ffcb61f6 100644 --- a/src/arch/arm64/include/armv8/arch/exception.h +++ b/src/arch/arm64/include/armv8/arch/exception.h @@ -30,19 +30,8 @@ #ifndef _ARCH_EXCEPTION_H #define _ARCH_EXCEPTION_H -#include - -struct exception_state -{ - uint64_t elr; - uint64_t esr; - uint64_t regs[31]; -} __attribute__((packed)); - /* Initialize the exception handling on the current CPU. */ void exception_hwinit(void); void exception_init(void); -void set_vbar(void *vbar); -void exception_dispatch(struct exception_state *state, int idx); #endif -- cgit v1.2.3