From 498c32a6e8d06e3989cb83def86952e9301b84ee Mon Sep 17 00:00:00 2001 From: Dennis Wassenberg <dennis.wassenberg@secunet.com> Date: Tue, 14 Oct 2014 17:29:36 +0200 Subject: siemens/sitemp_g1p1: Fix serial output for simo board The simo board with console output at UART port 1 (COM2) will not produce any output if CONFIG_UART_FOR_CONSOLE=1 is set correctly. Commit f29200240e428761827ab8d179fa23068bfa9d59 (superio/ite/*: Factor out generic romstage component) will only and always activate UART port 0 unregarded to CONFIG_UART_FOR_CONSOLE value. Now the UART port which was selected by CONFIG_UART_FOR_CONSOLE will be enabled and used for console output Change-Id: Ibbd2b5115b1ed4763962ba32fc9c19431a906c78 Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com> Reviewed-on: http://review.coreboot.org/7060 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> --- src/mainboard/siemens/sitemp_g1p1/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c index 33329991f1..4beb8c95b6 100644 --- a/src/mainboard/siemens/sitemp_g1p1/romstage.c +++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c @@ -46,7 +46,7 @@ #include "southbridge/amd/sb600/early_setup.c" #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */ -#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) +#define SERIAL_DEV PNP_DEV(0x2e, CONFIG_UART_FOR_CONSOLE == 1 ? IT8712F_SP2 : IT8712F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO) /* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/ -- cgit v1.2.3