From 483bed33a967b0e91704bfc53ffcc00a47b6c96f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sun, 14 Dec 2014 09:26:04 +0200
Subject: AGESA: Only fam14 sets Ontario APU IDs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Change-Id: I3d249a1234599e3820e4ad9b852bbb03a89dd49a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7810
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
src/northbridge/amd/agesa/agesawrapper.h | 3 ---
src/northbridge/amd/agesa/family12/agesawrapper.c | 8 --------
src/northbridge/amd/agesa/family14/agesawrapper.c | 4 ++++
src/northbridge/amd/pi/agesawrapper.h | 3 ---
4 files changed, 4 insertions(+), 14 deletions(-)
(limited to 'src')
diff --git a/src/northbridge/amd/agesa/agesawrapper.h b/src/northbridge/amd/agesa/agesawrapper.h
index 7b61b4cb49..421212e743 100644
--- a/src/northbridge/amd/agesa/agesawrapper.h
+++ b/src/northbridge/amd/agesa/agesawrapper.h
@@ -24,9 +24,6 @@
#include "Porting.h"
#include "AGESA.h"
-/* Define AMD Ontario APPU SSID/SVID */
-#define AMD_APU_SVID 0x1022
-#define AMD_APU_SSID 0x1234
#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
enum {
diff --git a/src/northbridge/amd/agesa/family12/agesawrapper.c b/src/northbridge/amd/agesa/family12/agesawrapper.c
index 8d0fe909f1..0c441eee35 100644
--- a/src/northbridge/amd/agesa/family12/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family12/agesawrapper.c
@@ -186,14 +186,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(VOID)
MsrReg = MsrReg | 0x0000400000000000ull;
LibAmdMsrWrite(0xC001001F, &MsrReg, &StdHeader);
- /* Set Ontario Link Data */
-//- PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0, 0, 0xE0);
-//- PciData = 0x01308002;
-//- LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-//- PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0, 0, 0xE4);
-//- PciData = (AMD_APU_SSID<<0x10)|AMD_APU_SVID;
-//- LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-
/* Enable Non-Post Memory in CPU */
PciData = ((CONFIG_MMCONF_BASE_ADDRESS >> 8) | 0x3FF80);
PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x018, 0x01, 0xA4);
diff --git a/src/northbridge/amd/agesa/family14/agesawrapper.c b/src/northbridge/amd/agesa/family14/agesawrapper.c
index 8d80ef18e2..70d8918dec 100644
--- a/src/northbridge/amd/agesa/family14/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family14/agesawrapper.c
@@ -36,6 +36,10 @@
#define MMCONF_ENABLE 1
+/* Define AMD Ontario APPU SSID/SVID */
+#define AMD_APU_SVID 0x1022
+#define AMD_APU_SSID 0x1234
+
/* ACPI table pointers returned by AmdInitLate */
VOID *DmiTable = NULL;
VOID *AcpiPstate = NULL;
diff --git a/src/northbridge/amd/pi/agesawrapper.h b/src/northbridge/amd/pi/agesawrapper.h
index b34556703b..d6558c45cc 100644
--- a/src/northbridge/amd/pi/agesawrapper.h
+++ b/src/northbridge/amd/pi/agesawrapper.h
@@ -24,9 +24,6 @@
#include "Porting.h"
#include "AGESA.h"
-/* Define AMD APU and SoC SSID/SVID */
-#define AMD_APU_SVID 0x1022
-#define AMD_APU_SSID 0x1234
#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
enum {
--
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