From 4821789e7cfb090fcc0bf9814852ffa7258ac96d Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Wed, 2 May 2018 15:15:45 -0600 Subject: soc/amd/stoneyridge: Remove USB30PortInit setting This bitmask sets the USB PORTSC.DR bit for each XHCI port. This is mainboard specific, and only for non-removable devices attached to the XHCI port. BUG=b:72859972 TEST=Boot grunt Change-Id: I0488b80da1fe4e57b06d3bc7a93ad9ebbfc97749 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/26015 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Garrett Kirkendall Reviewed-by: Marshall Dawson --- src/soc/amd/stoneyridge/BiosCallOuts.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src') diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index c6eef1a32f..d2f7a32618 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -68,9 +68,6 @@ AGESA_STATUS agesa_fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr) FchParams_env->Usb.Xhci0Enable = FALSE; FchParams_env->Usb.Xhci1Enable = FALSE; - /* 8: If USB3 port is unremoveable. */ - FchParams_env->Usb.USB30PortInit = 8; - /* SATA configuration */ FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE; switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) { -- cgit v1.2.3