From 44da9e201c58faf94ad22ec0fe18b693fd9d1239 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 27 Sep 2019 15:02:32 +0300 Subject: cpu,device/: Remove some __SIMPLE_DEVICE__ and __ROMCC__ use MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I62d7450c8e83eec7bf4ad5d0709269a132fd0499 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/35649 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/arch/x86/include/arch/cpu.h | 6 +++--- src/cpu/x86/mtrr/earlymtrr.c | 3 --- src/include/cpu/cpu.h | 9 +++++---- src/include/device/pci.h | 9 ++++----- 4 files changed, 12 insertions(+), 15 deletions(-) (limited to 'src') diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 263b734529..ffa532b47e 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -214,7 +214,8 @@ static inline bool cpu_is_intel(void) return CONFIG(CPU_INTEL_COMMON) || CONFIG(SOC_INTEL_COMMON); } -#ifndef __SIMPLE_DEVICE__ +#ifndef __ROMCC__ +/* romcc does not support anonymous structs. */ struct device; @@ -258,9 +259,8 @@ static inline struct cpu_info *cpu_info(void) ); return ci; } -#endif -#ifndef __ROMCC__ // romcc is segfaulting in some cases +/* romcc is segfaulting in some cases. */ struct cpuinfo_x86 { uint8_t x86; /* CPU family */ uint8_t x86_vendor; /* CPU vendor */ diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index 5d7ff2cf45..02dfbdc80d 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -38,9 +38,6 @@ int get_free_var_mtrr(void) return -1; } -#ifdef __ROMCC__ -static -#endif void set_var_mtrr( unsigned int reg, unsigned int base, unsigned int size, unsigned int type) diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index 9a283735d3..cdb681729e 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -3,7 +3,6 @@ #include -#if !defined(__ROMCC__) void cpu_initialize(unsigned int cpu_index); /* Returns default APIC id based on logical_cpu number or < 0 on failure. */ int cpu_get_apic_id(int logical_cpu); @@ -14,13 +13,15 @@ void initialize_cpus(struct bus *cpu_bus); asmlinkage void secondary_cpu_init(unsigned int cpu_index); int cpu_phys_address_size(void); +#if ENV_RAMSTAGE #define __cpu_driver __attribute__((used, __section__(".rodata.cpu_driver"))) -#ifndef __SIMPLE_DEVICE__ +#else +#define __cpu_driver __attribute__((unused)) +#endif + /** start of compile time generated pci driver array */ extern struct cpu_driver _cpu_drivers[]; /** end of compile time generated pci driver array */ extern struct cpu_driver _ecpu_drivers[]; -#endif -#endif /* !__ROMCC__ */ #endif /* CPU_CPU_H */ diff --git a/src/include/device/pci.h b/src/include/device/pci.h index fa695d440f..8d6a9ae520 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -55,11 +55,12 @@ struct msix_entry { u32 vec_control; }; -#ifdef __SIMPLE_DEVICE__ -#define __pci_driver __attribute__((unused)) -#else +#if ENV_RAMSTAGE #define __pci_driver __attribute__((used, __section__(".rodata.pci_driver"))) +#else +#define __pci_driver __attribute__((unused)) #endif + /** start of compile time generated pci driver array */ extern struct pci_driver _pci_drivers[]; /** end of compile time generated pci driver array */ @@ -119,12 +120,10 @@ void pci_early_mmio_window(pci_devfn_t p2p_bridge, u32 mmio_base, u32 mmio_size); int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base); -#ifndef __ROMCC__ static inline int pci_base_address_is_memory_space(unsigned int attr) { return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY; } -#endif #endif /* CONFIG_PCI */ -- cgit v1.2.3