From 44cc1b9cac00861ba008db1ea824960c35411599 Mon Sep 17 00:00:00 2001
From: David Wu <david_wu@quanta.corp-partner.google.com>
Date: Thu, 20 Oct 2022 13:33:20 +0800
Subject: mb/google/brask/var/kuldax: Revise PsysPL2 to 150W for Pentium CPU

Pentium CPU will use 150W adaptor, this change revises PsysPL2 to 150W
based on fw_config.

BUG=b:253542746
TEST=Check CPU PsysPL2=150W in AP log with Pentium CPU.

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I63b2a9d79454b20b60ba1317a8eebb3c10eff9d6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68665
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
---
 .../google/brya/variants/kuldax/overridetree.cb       |  6 ++++++
 src/mainboard/google/brya/variants/kuldax/ramstage.c  | 19 ++++++++++++++++++-
 2 files changed, 24 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/mainboard/google/brya/variants/kuldax/overridetree.cb b/src/mainboard/google/brya/variants/kuldax/overridetree.cb
index fdf37d5b81..a1587887ba 100644
--- a/src/mainboard/google/brya/variants/kuldax/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kuldax/overridetree.cb
@@ -3,6 +3,12 @@ fw_config
 		option AUDIO_UNKNOWN	0
 		option NAU88L25B_I2S	1
 	end
+	field BJ_POWER 3 4
+		option BJ_POWER_150W	0
+		option BJ_POWER_230W	1
+		option BJ_POWER_65W	2
+		option BJ_POWER_135W	3
+	end
 end
 
 chip soc/intel/alderlake
diff --git a/src/mainboard/google/brya/variants/kuldax/ramstage.c b/src/mainboard/google/brya/variants/kuldax/ramstage.c
index 14a365a407..4bec1d4447 100644
--- a/src/mainboard/google/brya/variants/kuldax/ramstage.c
+++ b/src/mainboard/google/brya/variants/kuldax/ramstage.c
@@ -6,6 +6,7 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <ec/google/chromeec/ec.h>
+#include <fw_config.h>
 #include <intelblocks/power_limit.h>
 
 const struct cpu_power_limits limits[] = {
@@ -26,6 +27,15 @@ const struct system_power_limits sys_limits[] = {
 	{ PCI_DID_INTEL_ADL_P_ID_3, 28, 150 },
 };
 
+const struct system_power_limits revise_sys_limits[] = {
+	/* SKU_ID, TDP (Watts), psys_pl2 (Watts) */
+	{ PCI_DID_INTEL_ADL_P_ID_10, 15, 150 },
+	{ PCI_DID_INTEL_ADL_P_ID_7, 15, 150 },
+	{ PCI_DID_INTEL_ADL_P_ID_6, 15, 150 },
+	{ PCI_DID_INTEL_ADL_P_ID_5, 28, 150 },
+	{ PCI_DID_INTEL_ADL_P_ID_3, 28, 150 },
+};
+
 /*
  * Psys_pmax considerations.
  *
@@ -55,6 +65,13 @@ const struct psys_config psys_config = {
 void variant_devtree_update(void)
 {
 	size_t total_entries = ARRAY_SIZE(limits);
-	variant_update_psys_power_limits(limits, sys_limits, total_entries, &psys_config);
+
+	if (fw_config_probe(FW_CONFIG(BJ_POWER, BJ_POWER_65W)))
+		variant_update_psys_power_limits(limits, sys_limits, total_entries,
+							&psys_config);
+	else
+		variant_update_psys_power_limits(limits, revise_sys_limits,
+							total_entries, &psys_config);
+
 	variant_update_power_limits(limits, total_entries);
 }
-- 
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