From 432e92688eca0e85cbaebca3232f65936b305a98 Mon Sep 17 00:00:00 2001 From: Bill XIE Date: Fri, 3 Nov 2023 12:34:01 +0800 Subject: drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum Proposed in the comment of commit 29030d0f3dad ("drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume"), during sanitize_cmos(), only reset CMOS range covered by checksum and the checksum itself from the file cmos.default in CBFS, in order to prevent other runtime data in CMOS (e.g. the DRAM training data on GM45 platforms for s3 resume) being erased. Tested: cherry-pick this commit before commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large value"), which is already before my commit 29030d0f3dad , Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from s3 again, indicating that DRAM training data are no longer erased. Signed-off-by: Bill XIE Co-authored-by: Jonathon Hall Change-Id: I872bf5f41422bc3424cd8631e932aaae2ae82f7a Reviewed-on: https://review.coreboot.org/c/coreboot/+/78906 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Jonathon Hall --- src/drivers/pc80/rtc/option.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c index 0954335762..cb18e14ae9 100644 --- a/src/drivers/pc80/rtc/option.c +++ b/src/drivers/pc80/rtc/option.c @@ -213,9 +213,12 @@ void sanitize_cmos(void) return; u8 control_state = cmos_disable_rtc(); - /* Max length of 256 spans bank 0 and bank 1 */ - for (i = 14; i < MIN(256, length); i++) + /* Copy checked range and the checksum from the default */ + for (i = LB_CKS_RANGE_START; i < MIN(LB_CKS_RANGE_END + 1, length); i++) cmos_write_inner(cmos_default[i], i); + /* CMOS checksum takes 2 bytes */ + cmos_write_inner(cmos_default[LB_CKS_LOC], LB_CKS_LOC); + cmos_write_inner(cmos_default[LB_CKS_LOC + 1], LB_CKS_LOC + 1); cmos_restore_rtc(control_state); } } -- cgit v1.2.3