From 405812209d76d35a47656b31c958a38b8cd9a109 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sat, 21 Dec 2019 08:52:31 +0200
Subject: arch/x86: Remove <arch/cbfs.h>
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There are no symmetrical headerfiles for other arch/ and
after ROMCC_BOOTBLOCK and walkcbfs() removal this file
ended up empty.

Change-Id: Ice3047630ced1f1471775411b93be6383f53e8bb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
---
 src/arch/x86/include/arch/cbfs.h                | 22 ----------------------
 src/drivers/intel/fsp1_1/romstage.c             |  1 -
 src/northbridge/intel/haswell/raminit.c         |  1 -
 src/northbridge/intel/nehalem/raminit.c         |  1 -
 src/northbridge/intel/sandybridge/raminit_mrc.c |  1 -
 src/soc/intel/broadwell/romstage/raminit.c      |  1 -
 src/soc/intel/broadwell/romstage/romstage.c     |  1 -
 src/southbridge/intel/bd82x6x/early_pch.c       |  1 -
 8 files changed, 29 deletions(-)
 delete mode 100644 src/arch/x86/include/arch/cbfs.h

(limited to 'src')

diff --git a/src/arch/x86/include/arch/cbfs.h b/src/arch/x86/include/arch/cbfs.h
deleted file mode 100644
index 1e5c59bf4b..0000000000
--- a/src/arch/x86/include/arch/cbfs.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __INCLUDE_ARCH_CBFS__
-#define __INCLUDE_ARCH_CBFS__
-
-#include <commonlib/cbfs_serialized.h>
-#include <endian.h>
-
-#define CBFS_SUBHEADER(_p) ((void *)((((uint8_t *)(_p)) + ntohl((_p)->offset))))
-
-#endif
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index 95148f744b..7773df731e 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -13,7 +13,6 @@
 
 #include <stddef.h>
 #include <arch/acpi.h>
-#include <arch/cbfs.h>
 #include <assert.h>
 #include <console/console.h>
 #include <cbmem.h>
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index 2fdbe07c8d..8267833858 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -17,7 +17,6 @@
 #include <console/usb.h>
 #include <string.h>
 #include <cbmem.h>
-#include <arch/cbfs.h>
 #include <cbfs.h>
 #include <cf9_reset.h>
 #include <ip_checksum.h>
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 8a2837e66e..215e9b82cb 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -23,7 +23,6 @@
 #include <cpu/x86/msr.h>
 #include <cbmem.h>
 #include <cf9_reset.h>
-#include <arch/cbfs.h>
 #include <ip_checksum.h>
 #include <pc80/mc146818rtc.h>
 #include <device/pci_def.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 29c766a59f..84100e7ef6 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -22,7 +22,6 @@
 #include <device/pci_ops.h>
 #include <arch/cpu.h>
 #include <cbmem.h>
-#include <arch/cbfs.h>
 #include <cbfs.h>
 #include <ip_checksum.h>
 #include <pc80/mc146818rtc.h>
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index 03b564f83a..3759c1f100 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cbfs.h>
 #include <assert.h>
 #include <cbfs.h>
 #include <cbmem.h>
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 6294b8adf3..4a53c7abe2 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -15,7 +15,6 @@
 
 #include <stddef.h>
 #include <stdint.h>
-#include <arch/cbfs.h>
 #include <arch/romstage.h>
 #include <bootmode.h>
 #include <cbmem.h>
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index b12ad38f47..b19216b9ec 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <device/pci_ops.h>
-#include <arch/cbfs.h>
 #include <cf9_reset.h>
 #include <ip_checksum.h>
 #include <device/pci_def.h>
-- 
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