From 3b9f71518390f5cdd71ecaf3414cf997fabf5198 Mon Sep 17 00:00:00 2001
From: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Date: Wed, 18 May 2022 15:09:52 +0800
Subject: mb/google/nissa/var/craask: Disable PCIe WLAN pins

Craask uses CNVi WLAN, so disable the PCIe-related GPIOs.

BUG=b:229040345
Test=emerge-nissa coreboot

Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Change-Id: I7bcf041503dcee448758dac46b1c9711d0b02ba3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64461
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
---
 src/mainboard/google/brya/variants/craask/gpio.c | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src')

diff --git a/src/mainboard/google/brya/variants/craask/gpio.c b/src/mainboard/google/brya/variants/craask/gpio.c
index 2ca514f36b..cc14d4c01a 100644
--- a/src/mainboard/google/brya/variants/craask/gpio.c
+++ b/src/mainboard/google/brya/variants/craask/gpio.c
@@ -9,8 +9,12 @@
 static const struct pad_config override_gpio_table[] = {
 	/* D6  : WWAN_EN */
 	PAD_CFG_GPO(GPP_D6, 1, DEEP),
+	/* D7  : WLAN_CLKREQ_ODL */
+	PAD_NC(GPP_D7, NONE),
 	/* F12 : WWAN_RST_L */
 	PAD_CFG_GPO(GPP_F12, 1, DEEP),
+	/* H3  : WLAN_PCIE_WAKE_ODL */
+	PAD_NC(GPP_H3, NONE),
 };
 
 /* Early pad configuration in bootblock */
-- 
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