From 37164b8dec8ba5b5a34f0d4ae43995ef1b492c18 Mon Sep 17 00:00:00 2001 From: Nick Vaccaro Date: Fri, 11 Jun 2021 18:07:11 -0700 Subject: mb/google/volteer/var/voema: change GPP_B2 to PLTRST Change GPP_B2 (EN_PP3300_SSD) to PLTRST to avoid S3 resume hang. Add GPP_B2 to the early_gpio_table. BUG=b:174776411 BRANCH=none TEST=none Change-Id: If8c253236051f6d170fab444cfc166e5d2ed7bc2 Signed-off-by: Nick Vaccaro Reviewed-on: https://review.coreboot.org/c/coreboot/+/55441 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/volteer/variants/voema/gpio.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/volteer/variants/voema/gpio.c b/src/mainboard/google/volteer/variants/voema/gpio.c index 8e59e1c071..70b7f52340 100644 --- a/src/mainboard/google/volteer/variants/voema/gpio.c +++ b/src/mainboard/google/volteer/variants/voema/gpio.c @@ -27,7 +27,7 @@ static const struct pad_config override_gpio_table[] = { PAD_CFG_GPO(GPP_A22, 1, DEEP), /* B2 : VRALERT# ==> EN_PP3300_SSD */ - PAD_CFG_GPO(GPP_B2, 1, DEEP), + PAD_CFG_GPO(GPP_B2, 1, PLTRST), /* B7 : ISH_12C1_SDA ==> ISH_I2C1_SENSOR_SDA */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* B8 : ISH_I2C1_SCL ==> ISH_I2C1_SENSOR_SCL */ @@ -182,11 +182,6 @@ const struct pad_config *variant_override_gpio_table(size_t *num) /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { - /* C8 : UART0 RX */ - PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), - /* C9 : UART0 TX */ - PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), - /* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */ PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1), /* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */ @@ -195,6 +190,8 @@ static const struct pad_config early_gpio_table[] = { /* A17 : DDSP_HPDC ==> MEM_CH_SEL */ PAD_CFG_GPI(GPP_A17, NONE, DEEP), + /* B2 : VRALERT# ==> EN_PP3300_SSD */ + PAD_CFG_GPO(GPP_B2, 1, PLTRST), /* B11 : PMCALERT# ==> PCH_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP), /* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */ @@ -208,6 +205,10 @@ static const struct pad_config early_gpio_table[] = { /* C0 : SMBCLK ==> EN_PP3300_WLAN */ PAD_CFG_GPO(GPP_C0, 1, DEEP), + /* C8 : UART0 RX */ + PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), + /* C9 : UART0 TX */ + PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* C21 : UART2_TXD ==> H1_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT), /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ -- cgit v1.2.3