From 36c00aa39b9374fbf5f762fb9ebb022bce1f7fa0 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Tue, 18 Apr 2006 22:40:53 +0000 Subject: fix adjustment for sizeram git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/gx2/northbridge.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index 981d5375e1..809a440e77 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -14,6 +14,11 @@ #include #define NORTHBRIDGE_FILE "northbridge.c" + +/* number of MB to take off the top of ram for VSM and display memory. + * FIXME -- make this configurable + */ +#define RAMADJUSTMB 9 /* */ @@ -139,7 +144,7 @@ setup_gx2_cache(void) val |= ((unsigned long long) DEVICE_PROPERTIES) << 28; /* sigh. Take our TOM, RIGHT shift 12, since it page-aligned, then LEFT-shift 8 for reg. */ /* yank off 8M for frame buffer and 1M for VSA */ - sizembytes -= 9; + sizembytes -= RAMADJUSTMB; sizereg = sizembytes; sizereg *= 0x100000; sizereg >>= 12; @@ -434,7 +439,7 @@ static void enable_dev(struct device *dev) do_vsmbios(); dev->ops = &pci_domain_ops; pci_set_method(dev); - ram_resource(dev, 0, 0, sizeram()*1024); + ram_resource(dev, 0, 0, (sizeram() - RAMADJUSTMB)*1024); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { printk_debug("DEVICE_PATH_APIC_CLUSTER\n"); -- cgit v1.2.3