From 34c835db307666385374670123477434c99473ec Mon Sep 17 00:00:00 2001 From: Hakim Giydan Date: Thu, 8 Sep 2016 10:57:28 -0700 Subject: soc/marvell/mvmap2315: Add WDT driver Testing: booted successfully. Change-Id: Ie9c9297f321c838f86e5536aab29f67a0eeb053d Signed-off-by: Hakim Giydan Reviewed-on: https://review.coreboot.org/15519 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/marvell/mvmap2315/Makefile.inc | 3 + src/soc/marvell/mvmap2315/include/soc/addressmap.h | 2 + src/soc/marvell/mvmap2315/include/soc/wdt.h | 55 ++++++++++++++++ src/soc/marvell/mvmap2315/wdt.c | 74 ++++++++++++++++++++++ 4 files changed, 134 insertions(+) create mode 100644 src/soc/marvell/mvmap2315/include/soc/wdt.h create mode 100644 src/soc/marvell/mvmap2315/wdt.c (limited to 'src') diff --git a/src/soc/marvell/mvmap2315/Makefile.inc b/src/soc/marvell/mvmap2315/Makefile.inc index ab3bddb2f1..a4a92d31fd 100644 --- a/src/soc/marvell/mvmap2315/Makefile.inc +++ b/src/soc/marvell/mvmap2315/Makefile.inc @@ -34,6 +34,7 @@ bootblock-y += reset.c bootblock-y += timer.c bootblock-y += sdram.c bootblock-y += uart.c +bootblock-y += wdt.c ramstage-y += cbmem.c ramstage-y += media.c @@ -44,6 +45,7 @@ ramstage-y += soc.c ramstage-y += timer.c ramstage-y += sdram.c ramstage-y += uart.c +ramstage-y += wdt.c romstage-y += cbmem.c romstage-y += clock.c @@ -56,6 +58,7 @@ romstage-y += romstage.c romstage-y += sdram.c romstage-y += timer.c romstage-y += uart.c +romstage-y += wdt.c CPPFLAGS_common += -Isrc/soc/marvell/mvmap2315/include/ diff --git a/src/soc/marvell/mvmap2315/include/soc/addressmap.h b/src/soc/marvell/mvmap2315/include/soc/addressmap.h index 6380e7d21d..198e8d4374 100644 --- a/src/soc/marvell/mvmap2315/include/soc/addressmap.h +++ b/src/soc/marvell/mvmap2315/include/soc/addressmap.h @@ -31,6 +31,8 @@ #define MVMAP2315_GPIOF_BASE 0xE0142000 #define MVMAP2315_GPIOG_BASE 0xE0142100 #define MVMAP2315_GPIOH_BASE 0xE0142200 +#define MVMAP2315_WDT0_BASE 0XE1010000 +#define MVMAP2315_WDT1_BASE 0XE1020000 #define MVMAP2315_A2BUS_BANKED_BASE 0xF0000000 #define MVMAP2315_A2BUS_ALIAS6_BASE 0xF0002000 diff --git a/src/soc/marvell/mvmap2315/include/soc/wdt.h b/src/soc/marvell/mvmap2315/include/soc/wdt.h new file mode 100644 index 0000000000..19715872ec --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/wdt.h @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MARVELL_MVMAP2315_WDT_H__ +#define __SOC_MARVELL_MVMAP2315_WDT_H__ + +#include + +#include +#include + +#define MVMAP2315_R4_WDT 0 +#define MVMAP2315_AP_WDT 1 + +#define MVMAP2315_WDT_CR_RPL_SHIFT 2 +#define MVMAP2315_WDT_CR_RMOD BIT(1) +#define MVMAP2315_WDT_CR_EN BIT(0) +#define MVMAP2315_WDT_TORR_TOP_SHIFT 0 +#define MVMAP2315_WDT_CRR_SHIFT 0 +struct mvmap2315_wdt_regs { + u32 wdt_cr; + u32 wdt_torr; + u32 wdt_ccvr; + u32 wdt_crr; + u32 wdt_stat; + u32 wdt_eoi; + u8 _reserved0[0xcc]; + u32 wdt_comp_params_5; + u32 wdt_comp_params_4; + u32 wdt_comp_params_3; + u32 wdt_comp_params_2; + u32 wdt_comp_params_1; + u32 wdt_comp_version; + u32 wdt_comp_type; +}; + +check_member(mvmap2315_wdt_regs, wdt_comp_type, 0xfc); + + +void enable_sp_watchdog(u32 timer, u32 timeout_value); +void reset_sp_watchdog(u32 timer, u32 timeout_value); + +#endif /* __SOC_MARVELL_MVMAP2315_WDT_H__ */ diff --git a/src/soc/marvell/mvmap2315/wdt.c b/src/soc/marvell/mvmap2315/wdt.c new file mode 100644 index 0000000000..8c643b7f95 --- /dev/null +++ b/src/soc/marvell/mvmap2315/wdt.c @@ -0,0 +1,74 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +#include +#include +#include + +struct mvmap2315_wdt_regs *mvmap2315_wdts[] = { + (struct mvmap2315_wdt_regs *)MVMAP2315_WDT0_BASE, + (struct mvmap2315_wdt_regs *)MVMAP2315_WDT1_BASE, +}; + +void enable_sp_watchdog(u32 timer, u32 timeout_value) +{ + u32 reg; + + reg = read32(&mvmap2315_wdts[timer]->wdt_cr); + + /* set watchdog Reset pulse length to the highest value + * (256 Pclk cycles) + */ + reg |= 7 << MVMAP2315_WDT_CR_RPL_SHIFT; + + /* set the watchdog timer to generate a system reset */ + reg &= ~MVMAP2315_WDT_CR_RMOD; + + write32(&mvmap2315_wdts[timer]->wdt_cr, reg); + + /* enable the watchdog timer */ + setbits_le32(&mvmap2315_wdts[timer]->wdt_cr, MVMAP2315_WDT_CR_EN); + + /* set watchdog Timeout Range Register */ + reg = timeout_value << MVMAP2315_WDT_TORR_TOP_SHIFT; + write32(&mvmap2315_wdts[timer]->wdt_torr, reg); + + /* reset the timer */ + reg = 0x76 << MVMAP2315_WDT_CRR_SHIFT; + write32(&mvmap2315_wdts[timer]->wdt_crr, reg); +} + +void reset_sp_watchdog(u32 timer, u32 timeout_value) +{ + u32 reg; + + /* set watchdog Timeout Range Register */ + reg = timeout_value << MVMAP2315_WDT_TORR_TOP_SHIFT; + write32(&mvmap2315_wdts[timer]->wdt_torr, reg); + + if (read32(&mvmap2315_wdts[timer]->wdt_cr) & MVMAP2315_WDT_CR_EN) { + /* reset the timer */ + reg = 0x76 << MVMAP2315_WDT_CRR_SHIFT; + write32(&mvmap2315_wdts[timer]->wdt_crr, reg); + } else { + /* enable the watchdog timer */ + setbits_le32(&mvmap2315_wdts[timer]->wdt_cr, + MVMAP2315_WDT_CR_EN); + } +} -- cgit v1.2.3