From 326a2c4794e392df2803a22cbaca66dbb5ed58fd Mon Sep 17 00:00:00 2001 From: Selma Bensaid Date: Thu, 23 Sep 2021 18:45:14 -0700 Subject: soc/intel/alderlake: Add GFx Device ID 0x46c3 This CL adds support for new ADL-M graphics Device ID 0x46c3. TEST=boot to OS Change-Id: Ib55fb501f96fe9bcc328202511bbfe84a3122285 Signed-off-by: Selma Bensaid Reviewed-on: https://review.coreboot.org/c/coreboot/+/57993 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/include/device/pci_ids.h | 1 + src/soc/intel/alderlake/bootblock/report_platform.c | 1 + src/soc/intel/common/block/graphics/graphics.c | 1 + 3 files changed, 3 insertions(+) (limited to 'src') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c36c1c6b42..be4ce76087 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3880,6 +3880,7 @@ #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0 #define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa +#define PCI_DEVICE_ID_INTEL_ADL_M_GT3 0x46c3 /* Intel Northbridge Ids */ #define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0 diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index d4b3951405..a053c7079c 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -109,6 +109,7 @@ static struct { { PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_M_GT3, "Alderlake M GT3" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index d9daaaf54a..8476b87b9e 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -310,6 +310,7 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_ADL_S_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT2, + PCI_DEVICE_ID_INTEL_ADL_M_GT3, 0, }; -- cgit v1.2.3